e64fc33e05
Due to number of IRQs the ROM offset, that contains MCUboot, needs to be moved to address that is aligned with 2048 byte long vector table. This comes from Cortex-M requirement where vector table needs to be placed at offset equal to lowest power of two number that will fit vector table. Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no> Signed-off-by: Mateusz Michalek <mateusz.michalek@nordicsemi.no> Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
13 lines
255 B
Plaintext
13 lines
255 B
Plaintext
# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_NRF54L15PDK_NRF54L15_CPUAPP
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config BT_CTLR
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default BT
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config ROM_START_OFFSET
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default 0x800 if BOOTLOADER_MCUBOOT
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endif # BOARD_NRF54L15PDK_NRF54L15_CPUAPP
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