Filip Kokosinski ab84989a12 arch/riscv: remove the Kconfig.core file ... This commit removes the `Kconfig.core` file. It's been largely unused, and the only symbol it provides (`RISCV_CORE_E31`) overlaps with the SoC-layer provided `SOC_SERIES_SIFIVE_FREEDOM_FE300`. As of date, the only SoC that uses the E31 core in Zephyr is the FE310 SoC. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>		2024-04-05 16:46:01 +03:00
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doc	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
board.cmake	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
board.yml	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
Kconfig	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
Kconfig.defconfig	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
Kconfig.qemu_riscv32_xip	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
qemu_riscv32_xip-pinctrl.dtsi	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
qemu_riscv32_xip.dts	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
qemu_riscv32_xip.yaml	hwmv2: Introduce Hardware model version 2 and convert devices	2024-03-02 16:56:33 -05:00
qemu_riscv32_xip_defconfig	arch/riscv: remove the Kconfig.core file	2024-04-05 16:46:01 +03:00