537d5c310c
Convert all of the NXP SOCs with ENET to use the new binding scheme, which is used by the new driver. Convert any boards using this SOC to the new scheme as well, and remove from the documentation the bit about the experimental nature of the new driver and the overlay that shall no longer exist. Some of the boards I do not have the hardware of, so apologies if something breaks, as I have no way to know. All the boards were made sure to at least build. Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
169 lines
2.6 KiB
Plaintext
169 lines
2.6 KiB
Plaintext
/*
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* Copyright (c) 2020 DENX Software Engineering GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_k66.dtsi>
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#include "ip_k66f-pinctrl.dtsi"
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/ {
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model = "SEGGER MK66F IP Switch board";
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compatible = "nxp,mk66f18", "nxp,k66f", "nxp,k6x";
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aliases {
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led0 = &red0_led;
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led2 = &red2_led;
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dsa-spi = &spi1;
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};
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chosen {
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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};
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leds {
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compatible = "gpio-leds";
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red0_led: led_0 {
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gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
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label = "User LD1";
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};
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red2_led: led_2 {
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gpios = <&gpioa 10 GPIO_ACTIVE_HIGH>;
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label = "User LD2";
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};
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};
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};
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&cpu0 {
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clock-frequency = <120000000>;
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};
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&sim {
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pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
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er32k-select = <KINETIS_SIM_ER32KSEL_RTC>;
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bus_clk {
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clock-div = <3>;
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};
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flash_clk {
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clock-div = <7>;
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};
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};
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&gpioa {
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status = "okay";
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};
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&gpiob {
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status = "okay";
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};
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 0x00010000>;
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read-only;
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};
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/*
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* The flash starting at 0x00010000 and ending at
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* 0x0001ffff (sectors 16-31) is reserved for use
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* by the application.
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*/
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storage_partition: partition@1e000 {
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label = "storage";
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reg = <0x0001e000 0x00002000>;
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};
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slot0_partition: partition@20000 {
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label = "image-0";
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reg = <0x00020000 0x00060000>;
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};
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slot1_partition: partition@80000 {
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label = "image-1";
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reg = <0x00080000 0x00060000>;
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};
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scratch_partition: partition@e0000 {
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label = "image-scratch";
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reg = <0x000e0000 0x00020000>;
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};
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};
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};
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&enet_mac {
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status = "okay";
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pinctrl-0 = <&enet_default>;
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pinctrl-names = "default";
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zephyr,random-mac-address;
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phy-connection-type = "rmii";
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phy-handle = <&phy>;
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};
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&enet_mdio {
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status = "okay";
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pinctrl-0 = <&enet_default>;
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pinctrl-names = "default";
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phy: phy@0 {
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compatible = "ethernet-phy";
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reg = <0>;
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status = "okay";
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fixed-link = "100BASE-T Full-Duplex";
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};
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};
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&spi1 {
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status = "okay";
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pinctrl-0 = <&spi1_default>;
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pinctrl-names = "default";
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clock-frequency = <44000000>;
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cs-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
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ksz8794: dsa@0 {
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compatible = "microchip,ksz8794";
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reg = <0>;
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spi-max-frequency = <44000000>;
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reset-gpios = <&gpiob 22 GPIO_ACTIVE_LOW>;
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spi-cpol;
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spi-cpha;
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dsa-master-port = <&enet_mac>;
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dsa-slave-ports = <3>;
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lan3: lan_3 {
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};
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lan2: lan_2 {
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};
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lan1: lan_1 {
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};
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};
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};
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&gpioa {
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status = "okay";
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};
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&gpiob {
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status = "okay";
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};
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&gpioe {
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status = "okay";
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};
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