953c5f2d32
According to the OPEN Alliance 10Base-T1x standard (point 7.7), it is mandatory to read at least single data chunk (no matter if received data is valid or not) to deassert the interrupt in the LAN865x (then the tc6 structure fields are also updated from the footer). Current approach with reading OA_BUFSTS register was providing the required information (RCA and TXC), but could cause transmission "stalls" as this operation (i.e. control, not data transmission) is not causing deassertion of the interrupt IRQ_N line from OA TC6 compliant device. With this patch - the transmission is always performed at least once, so interrupt is always deasserted. As the functionality of oa_tc6_update_buf_info() - i.e reading value of RCA and TXC - has been replaced with extracting data from footer, this function can be safely removed. Signed-off-by: Lukasz Majewski <lukma@denx.de>
253 lines
6.8 KiB
C
253 lines
6.8 KiB
C
/*
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* Copyright (c) 2023 DENX Software Engineering GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef OA_TC6_CFG_H__
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#define OA_TC6_CFG_H__
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#include <stdint.h>
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#include <stdbool.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/net/net_pkt.h>
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#define MMS_REG(m, r) ((((m) & GENMASK(3, 0)) << 16) | ((r) & GENMASK(15, 0)))
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/* Memory Map Sector (MMS) 0 */
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#define OA_ID MMS_REG(0x0, 0x000) /* expect 0x11 */
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#define OA_PHYID MMS_REG(0x0, 0x001)
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#define OA_RESET MMS_REG(0x0, 0x003)
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#define OA_RESET_SWRESET BIT(0)
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#define OA_CONFIG0 MMS_REG(0x0, 0x004)
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#define OA_CONFIG0_SYNC BIT(15)
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#define OA_CONFIG0_RFA_ZARFE BIT(12)
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#define OA_CONFIG0_PROTE BIT(5)
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#define OA_STATUS0 MMS_REG(0x0, 0x008)
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#define OA_STATUS0_RESETC BIT(6)
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#define OA_STATUS1 MMS_REG(0x0, 0x009)
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#define OA_BUFSTS MMS_REG(0x0, 0x00B)
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#define OA_BUFSTS_TXC GENMASK(15, 8)
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#define OA_BUFSTS_RCA GENMASK(7, 0)
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#define OA_IMASK0 MMS_REG(0x0, 0x00C)
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#define OA_IMASK0_TXPEM BIT(0)
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#define OA_IMASK0_TXBOEM BIT(1)
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#define OA_IMASK0_TXBUEM BIT(2)
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#define OA_IMASK0_RXBOEM BIT(3)
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#define OA_IMASK0_LOFEM BIT(4)
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#define OA_IMASK0_HDREM BIT(5)
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#define OA_IMASK1 MMS_REG(0x0, 0x00D)
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#define OA_IMASK0_UV18M BIT(19)
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/* OA Control header */
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#define OA_CTRL_HDR_DNC BIT(31)
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#define OA_CTRL_HDR_HDRB BIT(30)
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#define OA_CTRL_HDR_WNR BIT(29)
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#define OA_CTRL_HDR_AID BIT(28)
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#define OA_CTRL_HDR_MMS GENMASK(27, 24)
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#define OA_CTRL_HDR_ADDR GENMASK(23, 8)
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#define OA_CTRL_HDR_LEN GENMASK(7, 1)
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#define OA_CTRL_HDR_P BIT(0)
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/* OA Data header */
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#define OA_DATA_HDR_DNC BIT(31)
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#define OA_DATA_HDR_SEQ BIT(30)
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#define OA_DATA_HDR_NORX BIT(29)
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#define OA_DATA_HDR_DV BIT(21)
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#define OA_DATA_HDR_SV BIT(20)
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#define OA_DATA_HDR_SWO GENMASK(19, 16)
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#define OA_DATA_HDR_EV BIT(14)
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#define OA_DATA_HDR_EBO GENMASK(13, 8)
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#define OA_DATA_HDR_P BIT(0)
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/* OA Data footer */
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#define OA_DATA_FTR_EXST BIT(31)
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#define OA_DATA_FTR_HDRB BIT(30)
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#define OA_DATA_FTR_SYNC BIT(29)
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#define OA_DATA_FTR_RCA GENMASK(28, 24)
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#define OA_DATA_FTR_DV BIT(21)
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#define OA_DATA_FTR_SV BIT(20)
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#define OA_DATA_FTR_SWO GENMASK(19, 16)
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#define OA_DATA_FTR_FD BIT(15)
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#define OA_DATA_FTR_EV BIT(14)
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#define OA_DATA_FTR_EBO GENMASK(13, 8)
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#define OA_DATA_FTR_TXC GENMASK(5, 1)
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#define OA_DATA_FTR_P BIT(0)
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#define OA_TC6_HDR_SIZE 4
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#define OA_TC6_FTR_SIZE 4
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#define OA_TC6_BUF_ALLOC_TIMEOUT K_MSEC(10)
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#define OA_TC6_FTR_RCA_MAX GENMASK(4, 0)
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#define OA_TC6_FTR_TXC_MAX GENMASK(4, 0)
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/**
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* @brief OA TC6 data.
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*/
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struct oa_tc6 {
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/** Pointer to SPI device */
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const struct spi_dt_spec *spi;
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/** OA data payload (chunk) size */
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uint8_t cps;
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/**
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* Number of available chunks buffers in OA TC6 device to store
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* data for transmission
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*/
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uint8_t txc;
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/** Number of available chunks to read from OA TC6 device */
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uint8_t rca;
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/** Indication of pending interrupt in OA TC6 device */
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bool exst;
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/** Indication of OA TC6 device being ready for transmission */
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bool sync;
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/** Indication of protected control transmission mode */
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bool protected;
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/** Pointer to network buffer concatenated from received chunk */
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struct net_buf *concat_buf;
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};
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typedef struct {
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uint32_t address;
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uint32_t value;
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} oa_mem_map_t;
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/**
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* @brief Calculate parity bit from data
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*
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* @param x data to calculate parity
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*
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* @return 0 if number of ones is odd, 1 otherwise.
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*/
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static inline bool oa_tc6_get_parity(const uint32_t x)
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{
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uint32_t y;
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y = x ^ (x >> 1);
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y = y ^ (y >> 2);
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y = y ^ (y >> 4);
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y = y ^ (y >> 8);
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y = y ^ (y >> 16);
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return !(y & 1);
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}
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/**
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* @brief Read OA TC6 compliant device single register
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*
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* @param tc6 OA TC6 specific data
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*
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* @param reg register to read
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* @param val pointer to variable to store read value
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*
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* @return 0 if read was successful, <0 otherwise.
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*/
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int oa_tc6_reg_read(struct oa_tc6 *tc6, const uint32_t reg, uint32_t *val);
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/**
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* @brief Write to OA TC6 compliant device a single register
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*
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* @param tc6 OA TC6 specific data
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*
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* @param reg register to read
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* @param val data to send to device
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*
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* @return 0 if write was successful, <0 otherwise.
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*/
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int oa_tc6_reg_write(struct oa_tc6 *tc6, const uint32_t reg, uint32_t val);
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/**
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* @brief Enable or disable the protected mode for control transactions
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*
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* @param tc6 OA TC6 specific data
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*
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* @param prote enable or disable protected control transactions
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*
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* @return 0 if operation was successful, <0 otherwise.
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*/
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int oa_tc6_set_protected_ctrl(struct oa_tc6 *tc6, bool prote);
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/**
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* @brief Send OA TC6 data chunks to the device
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*
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* @param tc6 OA TC6 specific data
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*
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* @param pkt network packet to be send
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*
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* @return 0 if data send was successful, <0 otherwise.
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*/
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int oa_tc6_send_chunks(struct oa_tc6 *tc6, struct net_pkt *pkt);
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/**
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* @brief Read data chunks from OA TC6 device
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*
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* @param tc6 OA TC6 specific data
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*
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* @param pkt network packet to store received data
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*
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* @return 0 if read was successful, <0 otherwise.
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*/
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int oa_tc6_read_chunks(struct oa_tc6 *tc6, struct net_pkt *pkt);
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/**
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* @brief Perform SPI transfer of single chunk from/to OA TC6 device
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*
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* @param tc6 OA TC6 specific data
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*
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* @param buf_rx buffer to store read data
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*
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* @param buf_tx buffer with data to send
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*
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* @param hdr OA TC6 data transmission header value
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*
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* @param ftr poniter to OA TC6 data received footer
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*
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* @return 0 if transmission was successful, <0 otherwise.
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*/
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int oa_tc6_chunk_spi_transfer(struct oa_tc6 *tc6, uint8_t *buf_rx, uint8_t *buf_tx,
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uint32_t hdr, uint32_t *ftr);
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/**
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* @brief Read status from OA TC6 device
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*
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* @param tc6 OA TC6 specific data
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*
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* @param ftr poniter to OA TC6 data received footer
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*
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_read_status(struct oa_tc6 *tc6, uint32_t *ftr);
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/**
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* @brief Read, modify and write control register from OA TC6 device
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*
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* @param tc6 OA TC6 specific data
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*
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* @param reg register to modify
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*
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* @param mask bit mask for modified register
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*
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* @param value to be stored in the register
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*
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_reg_rmw(struct oa_tc6 *tc6, const uint32_t reg,
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uint32_t mask, uint32_t val);
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/**
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* @brief Check the status of OA TC6 device
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*
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* @param tc6 OA TC6 specific data
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*
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* @return 0 if successful, <0 otherwise.
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*/
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int oa_tc6_check_status(struct oa_tc6 *tc6);
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#endif /* OA_TC6_CFG_H__ */
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