6297f3640f
This commit adds the `andestech,andescore-v5` compatible string. This helps identify the core tpye form the final devicetree alone. Andes doesn't define which core type from the v5 series the AE350 SoC uses, so we're using the whole series name here. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
10 lines
225 B
YAML
10 lines
225 B
YAML
# Copyright (c) 2024 Antmicro <www.antmicro.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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description: Andes Technology RISC-V core from the AndesCore v5 series
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compatible: "andestech,andescore-v5"
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include: riscv,cpus.yaml
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