702caf1c7e
First pads are being configured for use by the FPGA. Then CPU loads usbserial bitstream. Finally it reenables clocks, sets up USB PID and waits for device to enumerate. Also disable software resets in used clocks. Signed-off-by: Michal Sieron <msieron@antmicro.com>
6 lines
116 B
Plaintext
6 lines
116 B
Plaintext
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=47972352
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CONFIG_PRINTK=y
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CONFIG_FPGA=y
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CONFIG_EOS_S3_FPGA=y
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CONFIG_BOOT_BANNER=n
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