zephyr/soc/xtensa
Tomasz Lissowski 042cb6ac4e soc: intel_adsp: enable DfTTS-based time stamping on ACE platforms
This patch enables time stamping controlled by DSP Timers / Time Stamping
logic on ACE1.5 / ACE2.0 platforms.

Signed-off-by: Tomasz Lissowski <tomasz.lissowski@intel.com>
2024-01-19 12:59:00 +01:00
..
dc233c xtensa: dc233c: force invalidating TLBs during page table swap 2023-12-27 15:59:05 +00:00
espressif_esp32 soc: esp32: refactor esp32_net 2024-01-13 00:22:24 +00:00
intel_adsp soc: intel_adsp: enable DfTTS-based time stamping on ACE platforms 2024-01-19 12:59:00 +01:00
nxp_adsp xtensa: nxp_adsp: common: Remove soc.c 2024-01-18 20:12:13 +01:00
sample_controller cmake: cleanup and simplify the standard include logic in Zephyr 2023-11-06 18:57:30 -05:00
CMakeLists.txt soc/xtensa/intel_adsp: Upstream updates 2020-10-21 06:38:53 -04:00