zephyr/arch/xtensa
Andy Ross 080e14f0f4 arch/xtensa: Rename "ALLOCA" ZSR to "A0SAVE"
This register alias was originally introduced to allow A0 to be used
as a scratch register when handling exceptions from MOVSP
instructions. (It replaced some upstream code from Cadence that
hard-coded EXCSAVE1).  Now the MMU code is now using too, and for
exactly the same purpose.

Calling it "ALLOCA" is only confusing.  Rename it to make it clear
what it's doing.

Signed-off-by: Andy Ross <andyross@google.com>
2023-11-21 15:49:48 +01:00
..
core arch/xtensa: Rename "ALLOCA" ZSR to "A0SAVE" 2023-11-21 15:49:48 +01:00
include xtensa: mark arch_switch ALWAYS_INLINE 2023-09-26 08:37:29 +02:00
CMakeLists.txt license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
Kconfig arch/xtensa: clean up arch_cpu_idle function 2023-11-20 11:14:41 +01:00