ce4018511f
Renesas Renesas SmartBond(tm) have two ADC blocks: GPADC and SDADC. This change adds drivers for both. Each ADC supports only one channel setup, drivers allow to have multiply channels in sequence. Switching between ADC sources in done in software. GPADC has 10 bit resolution (accuracy can be increase with oversampling). Values up to 3.6V can be measured on selected pins. V30 and VBAT1 can also be measured. SDADC has 14 bit resolution and can take measurements from 8 pins (single of differential) and VBAT. Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
328 lines
9.3 KiB
C
328 lines
9.3 KiB
C
/*
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* Copyright (c) 2023 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_smartbond_sdadc
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include <DA1469xAB.h>
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#include "adc_context.h"
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#include <zephyr/dt-bindings/adc/smartbond-adc.h>
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#define LOG_LEVEL CONFIG_ADC_LOG_LEVEL
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#include <zephyr/logging/log.h>
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#include <zephyr/irq.h>
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#include <zephyr/sys/math_extras.h>
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#include <zephyr/drivers/pinctrl.h>
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LOG_MODULE_REGISTER(adc_smartbond_sdadc);
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struct sdadc_smartbond_cfg {
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const struct pinctrl_dev_config *pcfg;
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/** Value for SDADC_CLK_FREQ */
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uint8_t sdadc_clk_freq;
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};
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struct sdadc_smartbond_data {
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struct adc_context ctx;
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/* Buffer to store channel data */
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uint16_t *buffer;
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/* Copy of channel mask from sequence */
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uint32_t channel_read_mask;
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/* Number of bits in sequence channels */
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uint8_t sequence_channel_count;
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/* Index in buffer to store current value to */
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uint8_t result_index;
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};
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#define SMARTBOND_SDADC_CHANNEL_COUNT 8
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struct sdadc_smartbond_channel_cfg {
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uint32_t sd_adc_ctrl_reg;
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};
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static struct sdadc_smartbond_channel_cfg m_sdchannels[SMARTBOND_SDADC_CHANNEL_COUNT];
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/* Implementation of the ADC driver API function: adc_channel_setup. */
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static int sdadc_smartbond_channel_setup(const struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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uint8_t channel_id = channel_cfg->channel_id;
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struct sdadc_smartbond_channel_cfg *config = &m_sdchannels[channel_id];
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if (channel_id >= SMARTBOND_SDADC_CHANNEL_COUNT) {
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return -EINVAL;
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}
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if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) {
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LOG_ERR("Selected ADC acquisition time is not valid");
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return -EINVAL;
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}
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if (channel_cfg->input_positive > SMARTBOND_SDADC_VBAT) {
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LOG_ERR("Channels out of range");
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return -EINVAL;
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}
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if (channel_cfg->differential) {
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if (channel_cfg->input_negative >= SMARTBOND_SDADC_VBAT) {
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LOG_ERR("Differential negative channels out of range");
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return -EINVAL;
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}
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}
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config->sd_adc_ctrl_reg = 0;
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if ((channel_cfg->input_positive == SMARTBOND_SDADC_VBAT &&
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channel_cfg->gain != ADC_GAIN_1_4) ||
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(channel_cfg->input_positive != SMARTBOND_SDADC_VBAT &&
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channel_cfg->gain != ADC_GAIN_1)) {
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LOG_ERR("ADC gain should be 1/4 for VBAT and 1 for all other channels");
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return -EINVAL;
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}
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switch (channel_cfg->reference) {
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case ADC_REF_INTERNAL:
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break;
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default:
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LOG_ERR("Selected ADC reference is not valid");
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return -EINVAL;
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}
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config->sd_adc_ctrl_reg =
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channel_cfg->input_positive << SDADC_SDADC_CTRL_REG_SDADC_INP_SEL_Pos;
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if (channel_cfg->differential) {
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config->sd_adc_ctrl_reg |=
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channel_cfg->input_negative << SDADC_SDADC_CTRL_REG_SDADC_INN_SEL_Pos;
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} else {
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config->sd_adc_ctrl_reg |= SDADC_SDADC_CTRL_REG_SDADC_SE_Msk;
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}
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return 0;
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}
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#define PER_CHANNEL_ADC_CONFIG_MASK (SDADC_SDADC_CTRL_REG_SDADC_INP_SEL_Msk | \
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SDADC_SDADC_CTRL_REG_SDADC_INN_SEL_Msk | \
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SDADC_SDADC_CTRL_REG_SDADC_SE_Msk \
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)
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static int pop_count(uint32_t n)
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{
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return __builtin_popcount(n);
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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uint32_t val;
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struct sdadc_smartbond_data *data =
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CONTAINER_OF(ctx, struct sdadc_smartbond_data, ctx);
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/* Extract lower channel from sequence mask */
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int current_channel = u32_count_trailing_zeros(data->channel_read_mask);
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if (ctx->sequence.calibrate) {
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/* TODO: Add calibration code */
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} else {
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val = SDADC->SDADC_CTRL_REG & ~PER_CHANNEL_ADC_CONFIG_MASK;
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val |= m_sdchannels[current_channel].sd_adc_ctrl_reg;
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val |= SDADC_SDADC_CTRL_REG_SDADC_START_Msk |
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SDADC_SDADC_CTRL_REG_SDADC_MINT_Msk;
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val |= (ctx->sequence.oversampling - 7) << SDADC_SDADC_CTRL_REG_SDADC_OSR_Pos;
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SDADC->SDADC_CTRL_REG = val;
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}
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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bool repeat)
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{
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struct sdadc_smartbond_data *data =
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CONTAINER_OF(ctx, struct sdadc_smartbond_data, ctx);
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if (!repeat) {
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data->buffer += data->sequence_channel_count;
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}
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}
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static int check_buffer_size(const struct adc_sequence *sequence,
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uint8_t active_channels)
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{
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size_t needed_buffer_size;
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needed_buffer_size = active_channels * sizeof(uint16_t);
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if (sequence->options) {
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needed_buffer_size *= (1 + sequence->options->extra_samplings);
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}
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if (sequence->buffer_size < needed_buffer_size) {
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LOG_ERR("Provided buffer is too small (%u/%u)",
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sequence->buffer_size, needed_buffer_size);
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return -ENOMEM;
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}
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return 0;
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}
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static int start_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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int error;
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struct sdadc_smartbond_data *data = dev->data;
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if (sequence->oversampling < 7U || sequence->oversampling > 10) {
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LOG_ERR("Invalid oversampling");
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return -EINVAL;
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}
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if ((sequence->channels == 0) ||
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((sequence->channels & ~BIT_MASK(SMARTBOND_SDADC_CHANNEL_COUNT)) != 0)) {
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LOG_ERR("Channel scanning is not supported");
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return -EINVAL;
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}
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if (sequence->resolution < 8 || sequence->resolution > 15) {
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LOG_ERR("ADC resolution value %d is not valid",
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sequence->resolution);
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return -EINVAL;
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}
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error = check_buffer_size(sequence, 1);
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if (error) {
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return error;
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}
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data->buffer = sequence->buffer;
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data->channel_read_mask = sequence->channels;
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data->sequence_channel_count = pop_count(sequence->channels);
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data->result_index = 0;
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adc_context_start_read(&data->ctx, sequence);
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error = adc_context_wait_for_completion(&data->ctx);
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return error;
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}
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static void sdadc_smartbond_isr(const struct device *dev)
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{
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struct sdadc_smartbond_data *data = dev->data;
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int current_channel = u32_count_trailing_zeros(data->channel_read_mask);
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SDADC->SDADC_CLEAR_INT_REG = 0;
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/* Store current channel value, result is left justified, move bits right */
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data->buffer[data->result_index++] = ((uint16_t)SDADC->SDADC_RESULT_REG) >>
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(16 - data->ctx.sequence.resolution);
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/* Exclude channel from mask for further reading */
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data->channel_read_mask ^= 1 << current_channel;
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if (data->channel_read_mask == 0) {
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adc_context_on_sampling_done(&data->ctx, dev);
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} else {
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adc_context_start_sampling(&data->ctx);
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}
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LOG_DBG("%s ISR triggered.", dev->name);
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}
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/* Implementation of the ADC driver API function: adc_read. */
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static int sdadc_smartbond_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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int error;
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struct sdadc_smartbond_data *data = dev->data;
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adc_context_lock(&data->ctx, false, NULL);
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error = start_read(dev, sequence);
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adc_context_release(&data->ctx, error);
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return error;
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}
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#if defined(CONFIG_ADC_ASYNC)
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/* Implementation of the ADC driver API function: adc_read_sync. */
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static int sdadc_smartbond_read_async(const struct device *dev,
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const struct adc_sequence *sequence,
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struct k_poll_signal *async)
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{
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struct sdadc_smartbond_data *data = dev->data;
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int error;
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adc_context_lock(&data->ctx, true, async);
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error = start_read(dev, sequence);
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adc_context_release(&data->ctx, error);
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return error;
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}
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#endif /* CONFIG_ADC_ASYNC */
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static int sdadc_smartbond_init(const struct device *dev)
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{
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int err;
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struct sdadc_smartbond_data *data = dev->data;
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const struct sdadc_smartbond_cfg *config = dev->config;
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SDADC->SDADC_CTRL_REG = SDADC_SDADC_CTRL_REG_SDADC_EN_Msk;
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SDADC->SDADC_CLEAR_INT_REG = 0x0;
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SDADC->SDADC_TEST_REG =
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(SDADC->SDADC_TEST_REG & ~SDADC_SDADC_TEST_REG_SDADC_CLK_FREQ_Msk) |
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(config->sdadc_clk_freq) << SDADC_SDADC_TEST_REG_SDADC_CLK_FREQ_Pos;
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/*
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* Configure dt provided device signals when available.
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* pinctrl is optional so ENOENT is not setup failure.
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*/
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err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
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if (err < 0 && err != -ENOENT) {
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LOG_ERR("ADC pinctrl setup failed (%d)", err);
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return err;
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}
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IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
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sdadc_smartbond_isr, DEVICE_DT_INST_GET(0), 0);
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NVIC_ClearPendingIRQ(DT_INST_IRQN(0));
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NVIC_EnableIRQ(DT_INST_IRQN(0));
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct adc_driver_api sdadc_smartbond_driver_api = {
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.channel_setup = sdadc_smartbond_channel_setup,
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.read = sdadc_smartbond_read,
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#ifdef CONFIG_ADC_ASYNC
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.read_async = sdadc_smartbond_read_async,
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#endif
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.ref_internal = 1200,
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};
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/*
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* There is only one instance on supported SoCs, so inst is guaranteed
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* to be 0 if any instance is okay. (We use adc_0 above, so the driver
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* is relying on the numeric instance value in a way that happens to
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* be safe.)
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*
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* Just in case that assumption becomes invalid in the future, we use
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* a BUILD_ASSERT().
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*/
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#define SDADC_INIT(inst) \
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BUILD_ASSERT((inst) == 0, \
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"multiple instances not supported"); \
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PINCTRL_DT_INST_DEFINE(inst); \
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static const struct sdadc_smartbond_cfg sdadc_smartbond_cfg_##inst = { \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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.sdadc_clk_freq = DT_INST_PROP(inst, clock_freq), \
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}; \
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static struct sdadc_smartbond_data sdadc_smartbond_data_##inst = { \
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ADC_CONTEXT_INIT_TIMER(sdadc_smartbond_data_##inst, ctx), \
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ADC_CONTEXT_INIT_LOCK(sdadc_smartbond_data_##inst, ctx), \
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ADC_CONTEXT_INIT_SYNC(sdadc_smartbond_data_##inst, ctx), \
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}; \
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DEVICE_DT_INST_DEFINE(0, \
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sdadc_smartbond_init, NULL, \
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&sdadc_smartbond_data_##inst, \
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&sdadc_smartbond_cfg_##inst, \
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POST_KERNEL, \
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CONFIG_ADC_INIT_PRIORITY, \
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&sdadc_smartbond_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(SDADC_INIT)
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