f389f702cb
Update IPM drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose the driver and enable it by default based on devicetree. We remove 'depend on' Kconfig for symbols that would be implied by the devicetree node existing. Signed-off-by: Kumar Gala <kumar.gala@intel.com>
61 lines
1.9 KiB
Plaintext
61 lines
1.9 KiB
Plaintext
# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2022, Intel Corporation
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config IPM_CAVS_IDC
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bool "CAVS DSP Intra-DSP Communication (IDC) driver"
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default y if MP_NUM_CPUS > 1 && SMP
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depends on CAVS_ICTL && DT_HAS_INTEL_ADSP_IDC_ENABLED
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help
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Driver for the Intra-DSP Communication (IDC) channel for
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cross SoC communications.
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config IPM_CALLBACK_ASYNC
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bool "Deliver callbacks asynchronously"
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default y if IPM_CAVS_HOST
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help
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When selected, the driver supports "asynchronous" command
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delivery. Commands will stay active after the ISR returns,
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until the application expressly "completes" the command
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later.
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config IPM_CAVS_HOST
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bool "cAVS DSP/host communication"
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select INTEL_ADSP_IPC
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help
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Driver for host/DSP communication on intel_adsp devices
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if IPM_CAVS_HOST
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config IPM_CAVS_HOST_INBOX_OFFSET
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hex "Byte offset of cAVS inbox window"
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depends on INTEL_ADSP_IPC
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default 0x6000
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help
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Location of the host-writable inbox window within the
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HP_SRAM_RESERVE region. This location must be synchronized
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with host driver and SOF source code (must match
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SRAM_INBOX_BASE). Be careful.
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config IPM_CAVS_HOST_OUTBOX_OFFSET
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hex "Byte offset of cAVS outbox memory"
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depends on INTEL_ADSP_IPC
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default 0x1000
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help
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Location of the "outbox" region for SOF IPC3/4 message
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within the pre-existing window 0 (this is not the same as
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the HP_SRAM_RESERVE region used for INBOX_OFFSET). This
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location must be synchronized with host driver and SOF
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source code (where it must equal SRAM_SW_REG_SIZE). Be
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careful.
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config IPM_CAVS_HOST_REGWORD
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bool "Store first 4 bytes in IPC register"
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depends on INTEL_ADSP_IPC
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depends on !SOC_INTEL_CAVS_V15
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help
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Protocol variant. When true, the first four bytes of a
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message are passed in the cAVS IDR/TDR register pair instead
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of in the SRAM window. Only available on cAVS 1.8+.
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endif # IPM_CAVS_HOST
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