0b004c0418
Configure RNG domain clock and align it on USB (as this is the same clk). This is not stricly required, as this configuration matches default reset but its more consistent this way. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||