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zephyr/arch
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Carlo Caione 0e788b89a6 riscv: Use IRQ vector table for vectored mode 
For vectored interrupts use the generated IRQ vector table instead of
relying on a custom-generated table.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-07 10:00:20 +02:00
..
arc arc: vector_table: Automatically place the IRQ vector table 2022-06-28 12:29:42 +02:00
arm arch: arm: aarch32: Disable FPU with TF-M 2022-07-06 11:53:51 -05:00
arm64 arch: arm64: add mising braces to single line if statements 2022-07-06 11:00:45 -04:00
common arch: Add support for IRQ vector tables with jump opcodes 2022-07-07 10:00:20 +02:00
mips arch: mips: add mising braces to single line if statements 2022-07-06 11:00:45 -04:00
nios2 asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
posix include: add more missing zephyr/ prefixes 2022-05-27 15:20:27 -07:00
riscv riscv: Use IRQ vector table for vectored mode 2022-07-07 10:00:20 +02:00
sparc asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
x86 arch: x86: workaround for EFI call return with interrupt enabled 2022-07-05 16:52:32 -04:00
xtensa debug: coredump: add xtensa intel adsp, support toolchains 2022-06-23 15:44:45 -04:00
CMakeLists.txt cmake: fix include directories to work with out-of-tree arch 2020-08-05 08:06:07 -04:00
Kconfig riscv: Use IRQ vector table for vectored mode 2022-07-07 10:00:20 +02:00