Carlo Caione 0ed637a7b6 arch: cortex-m: Enable support for S2RAM ... Enable S2RAM for Cortex-M hooking up the provided API functions. Signed-off-by: Carlo Caione <ccaione@baylibre.com>		2022-07-11 15:26:26 +02:00
..
arc	arc: vector_table: Automatically place the IRQ vector table	2022-06-28 12:29:42 +02:00
arm	arch: cortex-m: Enable support for S2RAM	2022-07-11 15:26:26 +02:00
arm64	arch: arm64: initialize IRQ stack for CONFIG_INIT_STACKS	2022-07-08 19:59:24 +00:00
common	gen_isr_tables.py: Move to scripts directory	2022-07-07 17:58:34 +00:00
mips	arch: mips: add mising braces to single line if statements	2022-07-06 11:00:45 -04:00
nios2	asm: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
posix	include: add more missing zephyr/ prefixes	2022-05-27 15:20:27 -07:00
riscv	riscv: Use IRQ vector table for vectored mode	2022-07-07 10:00:20 +02:00
sparc	asm: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
x86	arch: x86: workaround for EFI call return with interrupt enabled	2022-07-05 16:52:32 -04:00
xtensa	debug: coredump: add xtensa intel adsp, support toolchains	2022-06-23 15:44:45 -04:00
CMakeLists.txt	cmake: fix include directories to work with out-of-tree arch	2020-08-05 08:06:07 -04:00
Kconfig	arch: Introduce S2RAM interface	2022-07-11 15:26:26 +02:00