Guennadi Liakhovetski 7a85983ebc xtensa: remove ELF section address rewriting ... Now rimage can handle both cached and uncached addresses correctly, ELF rewriting isn't needed any more. Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>		2023-03-20 09:52:15 +01:00
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esp32	soc: xtensa: esp32: increase shared memory region	2023-03-16 16:42:13 +01:00
esp32_net	soc: xtensa: esp32: increase shared memory region	2023-03-16 16:42:13 +01:00
esp32s2	ESP32-S2: fix - use correct storage label	2023-03-02 09:59:10 +01:00
esp32s3	soc: esp32s3: add base source content	2023-02-27 19:41:33 +01:00
intel_adsp	xtensa: remove ELF section address rewriting	2023-03-20 09:52:15 +01:00
nxp_adsp	xtensa: linker: Use zephyr's convention for rodata	2022-11-17 15:44:48 +09:00
sample_controller	xtensa: linker: Use zephyr's convention for rodata	2022-11-17 15:44:48 +09:00
CMakeLists.txt	soc/xtensa/intel_adsp: Upstream updates	2020-10-21 06:38:53 -04:00