05ab1c5f77
This chip uses an active low reset, so the correct behavior here is to define the pin as ACTIVE_LOW, using GPIO_OUTPUT_ACTIVE to assert the reset and set to 0 to deassert. Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
57 lines
1.3 KiB
Plaintext
57 lines
1.3 KiB
Plaintext
/*
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* Copyright 2023, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/{
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chosen {
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zephyr,display = &rm67162_g1120b0mipi;
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};
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en_mipi_display_g1120b0mipi: enable-mipi-display {
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compatible = "regulator-fixed";
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regulator-name = "en_mipi_display";
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enable-gpios = <&nxp_mipi_connector 32 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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};
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lvgl_pointer {
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compatible = "zephyr,lvgl-pointer-input";
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input = <&ft3267_g1120b0mipi>;
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invert-y;
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};
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};
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&nxp_mipi_i2c {
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status = "okay";
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ft3267_g1120b0mipi: ft3267@38 {
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/*
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* Note- the actual controller present on this IC is a FT3267,
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* but the FT35336 driver in Zephyr supports this IC.
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*/
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compatible = "focaltech,ft5336";
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reg = <0x38>;
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int-gpios = <&nxp_mipi_connector 29 GPIO_ACTIVE_LOW>;
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reset-gpios = <&nxp_mipi_connector 28 GPIO_ACTIVE_LOW>;
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};
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};
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&zephyr_mipi_dsi {
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status = "okay";
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autoinsert-eotp;
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phy-clock = <316800000>;
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rm67162_g1120b0mipi: rm67162@0 {
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status = "okay";
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compatible = "raydium,rm67162";
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reg = <0x0>;
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reset-gpios = <&nxp_mipi_connector 21 GPIO_ACTIVE_HIGH>;
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bl-gpios = <&nxp_mipi_connector 0 GPIO_ACTIVE_HIGH>;
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te-gpios = <&nxp_mipi_connector 22 GPIO_ACTIVE_HIGH>;
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data-lanes = <1>;
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width = <400>;
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height = <392>;
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pixel-format = <MIPI_DSI_PIXFMT_RGB565>;
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};
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};
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