2176ca9f9b
This commit updates the device tree and memory header file for the Intel cAVS 2.5 platform to define the LSBPM and HSBPM registers. Changes include: - Added node definitions for 'lsbpm' and 'hsbpm' in intel_adsp_cavs25.dtsi and intel_adsp_cavs25_tgph.dtsi - Updated adsp_memory.h Signed-off-by: Damian Nikodem <damian.nikodem@intel.com> |
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espressif | ||
intel | ||
nxp | ||
dc233c.dtsi | ||
sample_controller.dtsi | ||
xtensa.dtsi |