Karsten Koenig 2e61137cc9 arch: riscv: thread: Init soc context on stack ... The optional SOC_CONTEXT carries processor state registers that need to be initialized properly to avoid uninitialized memory read as processor state. In particular on the RV32M1 the extra soc context stores a state for special loop instructions, and loading non zero values will have the core assume it is in a loop. Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>		2020-07-13 15:00:19 -05:00
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core	arch: riscv: thread: Init soc context on stack	2020-07-13 15:00:19 -05:00
include	kernel: remove legacy fields in _kernel	2020-05-08 17:42:49 +02:00
CMakeLists.txt	riscv: toolchain arguments for a 64-bit build	2019-08-09 09:11:45 -05:00
Kconfig	kconfig: Rename CONFIG_FLOAT to CONFIG_FPU	2020-04-27 19:03:44 +02:00