3ae52624ff
Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
219 lines
5.8 KiB
Plaintext
219 lines
5.8 KiB
Plaintext
# SPDX-License-Identifier: Apache-2.0
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menuconfig UART_NS16550
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bool "NS16550 serial driver"
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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help
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This option enables the NS16550 serial driver.
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This driver can be used for the serial hardware
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available on x86 boards.
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config UART_NS16550_PCI
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bool "Enable PCI Support"
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depends on PCI && UART_NS16550
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help
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This enables NS16550 to probe for PCI-based serial devices.
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This option enables the driver to auto-detect the device
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configuration required to access those ports.
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config UART_NS16550_DLF
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bool "Enable Divisor Latch Fraction (DLF) support"
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depends on UART_NS16550
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help
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This enables support for divisor latch fraction (DLF).
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It is used to limit frequency error.
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Says n if you are not sure if hardware supports this.
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config UART_NS16550_PCP
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bool "Enable Apollo Lake PRV_CLOCK_PARAMS (PCP) support"
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depends on SOC_APOLLO_LAKE && UART_NS16550
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help
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This enables configuration of the clock blocks that feed
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the UARTs on Apollo Lake SoCs, allowing the generation of
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custom baud rates.
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Say n unless you know you need this feature.
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config UART_NS16550_LINE_CTRL
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bool "Enable Serial Line Control for Apps"
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depends on UART_LINE_CTRL && UART_NS16550
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help
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This enables the API for apps to control the serial line,
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such as CTS and RTS.
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Says n if not sure.
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config UART_NS16550_DRV_CMD
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bool "Enable Driver Commands"
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depends on UART_DRV_CMD && UART_NS16550
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help
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This enables the API for apps to send commands to driver.
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Says n if not sure.
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config UART_NS16750
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bool "Enable 64-bytes FIFO for UART 16750"
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depends on UART_NS16550
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help
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This enables support for 64-bytes FIFO if UART controller is 16750.
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# ---------- Port 0 ----------
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menuconfig UART_NS16550_PORT_0
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bool "Enable NS16550 Port 0"
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depends on UART_NS16550
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_NS16550_PORT_0_OPTIONS
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int "Port 0 Options"
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default 0
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depends on UART_NS16550_PORT_0
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help
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Options used for port initialization.
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config UART_NS16550_PORT_0_DLF
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hex "Port 0 DLF value"
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default 0x0
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depends on UART_NS16550_PORT_0 && UART_NS16550_DLF
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help
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Value for DLF register.
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config UART_NS16550_PORT_0_PCP
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hex "Port 0 PCP value"
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default 0
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depends on UART_NS16550_PORT_0 && UART_NS16550_PCP
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help
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Value for PRV_CLOCK_PARAMS register. If left at its default
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value (0), then the kernel will not attempt to set the PCP
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for this UART; otherwise be sure the device tree for this
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port has sys_clk_freq set accordingly.
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config UART_NS16550_PORT_0_PCI
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bool "Port 0 is PCI-based"
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depends on UART_NS16550_PCI && UART_NS16550_PORT_0
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help
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Obtain port information from PCI.
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# ---------- Port 1 ----------
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menuconfig UART_NS16550_PORT_1
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bool "Enable NS16550 Port 1"
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depends on UART_NS16550
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_NS16550_PORT_1_OPTIONS
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int "Port 1 Options"
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default 0
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depends on UART_NS16550_PORT_1
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help
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Options used for port initialization.
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config UART_NS16550_PORT_1_DLF
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hex "Port 1 DLF value"
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default 0x0
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depends on UART_NS16550_PORT_1 && UART_NS16550_DLF
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help
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Value for DLF register.
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config UART_NS16550_PORT_1_PCP
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hex "Port 1 PCP value"
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default 0
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depends on UART_NS16550_PORT_1 && UART_NS16550_PCP
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help
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Value for PRV_CLOCK_PARAMS register. If left at its default
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value (0), then the kernel will not attempt to set the PCP
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for this UART; otherwise be sure the device tree for this
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port has sys_clk_freq set accordingly.
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config UART_NS16550_PORT_1_PCI
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bool "Port 1 is PCI-based"
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depends on UART_NS16550_PCI && UART_NS16550_PORT_1
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help
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Obtain port information from PCI.
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# ---------- Port 2 ----------
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menuconfig UART_NS16550_PORT_2
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bool "Enable NS16550 Port 2"
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depends on UART_NS16550
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_NS16550_PORT_2_OPTIONS
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int "Port 2 Options"
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default 0
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depends on UART_NS16550_PORT_2
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help
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Options used for port initialization.
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config UART_NS16550_PORT_2_DLF
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hex "Port 2 DLF value"
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default 0x0
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depends on UART_NS16550_PORT_2 && UART_NS16550_DLF
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help
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Value for DLF register.
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config UART_NS16550_PORT_2_PCP
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hex "Port 2 PCP value"
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default 0
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depends on UART_NS16550_PORT_2 && UART_NS16550_PCP
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help
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Value for PRV_CLOCK_PARAMS register. If left at its default
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value (0), then the kernel will not attempt to set the PCP
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for this UART; otherwise be sure the device tree for this
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port has sys_clk_freq set accordingly.
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config UART_NS16550_PORT_2_PCI
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bool "Port 2 is PCI-based"
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depends on UART_NS16550_PCI && UART_NS16550_PORT_2
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help
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Obtain port information from PCI.
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# ---------- Port 3 ----------
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menuconfig UART_NS16550_PORT_3
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bool "Enable NS16550 Port 3"
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depends on UART_NS16550
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_NS16550_PORT_3_OPTIONS
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int "Port 3 Options"
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default 0
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depends on UART_NS16550_PORT_3
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help
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Options used for port initialization.
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config UART_NS16550_PORT_3_DLF
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hex "Port 3 DLF value"
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default 0x0
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depends on UART_NS16550_PORT_3 && UART_NS16550_DLF
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help
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Value for DLF register.
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config UART_NS16550_PORT_3_PCP
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hex "Port 3 PCP value"
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default 0
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depends on UART_NS16550_PORT_3 && UART_NS16550_PCP
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help
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Value for PRV_CLOCK_PARAMS register. If left at its default
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value (0), then the kernel will not attempt to set the PCP
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for this UART; otherwise be sure the device tree for this
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port has sys_clk_freq set accordingly.
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config UART_NS16550_PORT_3_PCI
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bool "Port 3 is PCI-based"
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depends on UART_NS16550_PCI && UART_NS16550_PORT_3
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help
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Obtain port information from PCI.
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