4ec9758034
On ARC, the _sw_isr_table has an actual size of CONFIG_NUM_IRQS - 16 because the 16 first IRQ are reserved. This patch has no impact on the generated binary but allows the debugger to display valid information instead of displaying 16 false entries containing garbage. Change-Id: Iae2756c1bc333dc822e9f80c2115fba6521792a2 Signed-off-by: Fabien Chereau <fabien.chereau@intel.com>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* Copyright (c) 2014, Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Software-managed ISR table
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*
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* Data types for a software-managed ISR table, with a parameter per-ISR.
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*/
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#ifndef _SW_ISR_TABLE__H_
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#define _SW_ISR_TABLE__H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if !defined(_ASMLANGUAGE)
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/*
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* Note the order: arg first, then ISR. This allows a table entry to be
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* loaded arg -> r0, isr -> r3 in _isr_wrapper with one ldmia instruction,
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* on ARM Cortex-M (Thumb2).
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*/
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struct _IsrTableEntry {
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void *arg;
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void (*isr)(void *);
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};
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typedef struct _IsrTableEntry _IsrTableEntry_t;
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#ifdef CONFIG_ARC
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extern _IsrTableEntry_t _sw_isr_table[CONFIG_NUM_IRQS - 16];
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#else
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extern _IsrTableEntry_t _sw_isr_table[CONFIG_NUM_IRQS];
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#endif
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SW_ISR_TABLE__H_ */
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