zephyr/soc
Dino Li 48e0dbbca4 soc: it8xxx2: enable CONFIG_RISCV_GP
This will bring better performance on accessing global variables
that are in 4K span by the GP register.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-10-13 06:17:56 -04:00
..
arc boards: arc: add a nsim_hs_mpuv6 board simulator 2021-08-27 11:45:43 -04:00
arm soc: stm23u5: Provide power implementation 2021-10-07 15:38:40 -04:00
arm64 soc: arm64: Add Kconfig files for Intel SoC FPGA 2021-10-12 08:37:03 -04:00
nios2 soc: nios2: Cleanup linker scripts to use new DTS macros 2020-04-30 20:59:13 -05:00
posix posix: Add missing include 2021-04-27 13:17:36 -04:00
riscv soc: it8xxx2: enable CONFIG_RISCV_GP 2021-10-13 06:17:56 -04:00
sparc boards: set CPU_HAS_FPU on LEON3 soc and boards 2020-12-04 14:33:43 +02:00
x86 bluetooth: remove Kconfig options CONFIG_BT_*_ON_DEV_NAME 2021-08-25 18:05:17 -04:00
xtensa esp32s2: drivers: spi: add driver support 2021-10-10 14:52:41 -04:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00