b1c0bf8499
Add a driver to support the Xilinx AXI IIC Bus Interface logic core, as described in Xilinx document PG090. This can be configured for use on most Xilinx FPGA-based platforms such as the Digilent Arty. Both the 2.00a and 2.1 versions of the core are supported. The 2.00a revision has a bug causing dynamic read mode to not be reliable. With this version of the core the driver falls back to reading only 1 byte per interrupt. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
12 lines
376 B
Plaintext
12 lines
376 B
Plaintext
# Copyright 2023 Calian Ltd. All rights reserved.
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
config I2C_XILINX_AXI
|
|
bool "Xilinx AXI I2C driver"
|
|
default y
|
|
depends on DT_HAS_XLNX_XPS_IIC_2_00_A_ENABLED || DT_HAS_XLNX_XPS_IIC_2_1_ENABLED
|
|
select EVENTS
|
|
help
|
|
Enable the Xilinx AXI IIC Bus Interface driver.
|
|
This is an FPGA logic core as described by Xilinx document PG090.
|