a57db0ddcb
Since all CAN controllers drivers seem to support automatic recovery (for any future drivers for hardware without this hardware capability this can easily be implemented in the driver), change the Zephyr CAN controller API policy to: - Always enable automatic bus recovery upon driver initialization, regardless of Kconfig options. Since CAN controllers are initialized in "stopped" state, no unwanted bus-off recovery will be started at this point. - Invert and rename the Kconfig CONFIG_CAN_AUTO_BUS_OFF_RECOVERY, which is enabled by default, to CONFIG_CAN_MANUAL_RECOVERY_MODE, which is disabled by default. Enabling CONFIG_CAN_MANUAL_RECOVERY_MODE=y enables support for the can_recover() API function and a new manual recovery mode (see next bullet). Keeping this guarded by Kconfig allows keeping the flash footprint down for applications not using manual bus-off recovery. - Introduce a new CAN controller operational mode CAN_MODE_MANUAL_RECOVERY. Support for this is only enabled if CONFIG_CAN_MANUAL_RECOVERY_MODE=y. Having this as a mode allows applications to inquire whether the CAN controller supports manual recovery mode via the can_get_capabilities() API function and either fail or rely on automatic recovery - and it allows CAN controller drivers not supporting manual recovery mode to fail early in can_set_mode() during application startup instead of failing when can_recover() is called at a later point in time. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
299 lines
10 KiB
C
299 lines
10 KiB
C
/*
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* Copyright (c) 2023 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nuvoton_numaker_canfd
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#include <zephyr/drivers/reset.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/drivers/can.h>
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#include <zephyr/drivers/can/can_mcan.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/clock_control_numaker.h>
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#include <zephyr/logging/log.h>
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#include <soc.h>
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#include <NuMicro.h>
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LOG_MODULE_REGISTER(can_numaker, CONFIG_CAN_LOG_LEVEL);
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/* CANFD Clock Source Selection */
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#define NUMAKER_CANFD_CLKSEL_HXT 0
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#define NUMAKER_CANFD_CLKSEL_PLL_DIV2 1
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#define NUMAKER_CANFD_CLKSEL_HCLK 2
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#define NUMAKER_CANFD_CLKSEL_HIRC 3
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/* Implementation notes
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* 1. Use Bosch M_CAN driver (m_can) as backend
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* 2. Need to modify can_numaker_get_core_clock() for new SOC support
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*/
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struct can_numaker_config {
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mm_reg_t canfd_base;
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mem_addr_t mrba;
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mem_addr_t mram;
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const struct reset_dt_spec reset;
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uint32_t clk_modidx;
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uint32_t clk_src;
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uint32_t clk_div;
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const struct device *clk_dev;
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void (*irq_config_func)(const struct device *dev);
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const struct pinctrl_dev_config *pincfg;
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};
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static int can_numaker_get_core_clock(const struct device *dev, uint32_t *rate)
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{
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const struct can_mcan_config *mcan_config = dev->config;
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const struct can_numaker_config *config = mcan_config->custom;
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uint32_t clksrc_rate_idx;
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uint32_t clkdiv_divider;
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/* Module clock source rate */
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clksrc_rate_idx = CLK_GetModuleClockSource(config->clk_modidx);
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/* Module clock divider */
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clkdiv_divider = CLK_GetModuleClockDivider(config->clk_modidx) + 1;
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switch (clksrc_rate_idx) {
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case NUMAKER_CANFD_CLKSEL_HXT:
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*rate = __HXT / clkdiv_divider;
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break;
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case NUMAKER_CANFD_CLKSEL_PLL_DIV2:
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*rate = (CLK_GetPLLClockFreq() / 2) / clkdiv_divider;
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break;
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case NUMAKER_CANFD_CLKSEL_HCLK:
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*rate = CLK_GetHCLKFreq() / clkdiv_divider;
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break;
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case NUMAKER_CANFD_CLKSEL_HIRC:
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*rate = __HIRC / clkdiv_divider;
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break;
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default:
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LOG_ERR("Invalid clock source rate index");
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return -EIO;
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}
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LOG_DBG("Clock rate index/divider: %d/%d", clksrc_rate_idx, clkdiv_divider);
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return 0;
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}
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static inline int can_numaker_init_unlocked(const struct device *dev)
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{
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const struct can_mcan_config *mcan_config = dev->config;
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const struct can_numaker_config *config = mcan_config->custom;
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struct numaker_scc_subsys scc_subsys;
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int rc;
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memset(&scc_subsys, 0x00, sizeof(scc_subsys));
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scc_subsys.subsys_id = NUMAKER_SCC_SUBSYS_ID_PCC;
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scc_subsys.pcc.clk_modidx = config->clk_modidx;
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scc_subsys.pcc.clk_src = config->clk_src;
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scc_subsys.pcc.clk_div = config->clk_div;
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/* To enable clock */
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rc = clock_control_on(config->clk_dev, (clock_control_subsys_t) &scc_subsys);
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if (rc < 0) {
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return rc;
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}
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/* To set module clock */
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rc = clock_control_configure(config->clk_dev, (clock_control_subsys_t)&scc_subsys, NULL);
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if (rc < 0) {
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return rc;
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}
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/* Configure pinmux (NuMaker's SYS MFP) */
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rc = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
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if (rc < 0) {
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return rc;
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}
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/* Reset CAN to default state, same as BSP's SYS_ResetModule(id_rst) */
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reset_line_toggle_dt(&config->reset);
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config->irq_config_func(dev);
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rc = can_mcan_configure_mram(dev, config->mrba, config->mram);
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if (rc != 0) {
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return rc;
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}
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rc = can_mcan_init(dev);
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if (rc < 0) {
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LOG_ERR("Failed to initialize mcan: %d", rc);
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return rc;
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}
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#if CONFIG_CAN_LOG_LEVEL >= LOG_LEVEL_DBG
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uint32_t rate;
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rc = can_numaker_get_core_clock(dev, &rate);
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if (rc < 0) {
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return rc;
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}
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LOG_DBG("CAN core clock: %d", rate);
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#endif
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return rc;
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}
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static int can_numaker_init(const struct device *dev)
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{
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const struct can_mcan_config *mcan_config = dev->config;
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const struct can_numaker_config *config = mcan_config->custom;
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int rc;
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if (!device_is_ready(config->reset.dev)) {
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LOG_ERR("reset controller not ready");
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return -ENODEV;
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}
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if (!device_is_ready(config->clk_dev)) {
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LOG_ERR("clock controller not ready");
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return -ENODEV;
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}
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SYS_UnlockReg();
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rc = can_numaker_init_unlocked(dev);
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SYS_LockReg();
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return rc;
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}
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static const struct can_driver_api can_numaker_driver_api = {
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.get_capabilities = can_mcan_get_capabilities,
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.start = can_mcan_start,
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.stop = can_mcan_stop,
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.set_mode = can_mcan_set_mode,
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.set_timing = can_mcan_set_timing,
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.send = can_mcan_send,
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.add_rx_filter = can_mcan_add_rx_filter,
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.remove_rx_filter = can_mcan_remove_rx_filter,
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#ifdef CONFIG_CAN_MANUAL_RECOVERY_MODE
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.recover = can_mcan_recover,
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#endif /* CONFIG_CAN_MANUAL_RECOVERY_MODE */
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.get_state = can_mcan_get_state,
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.set_state_change_callback = can_mcan_set_state_change_callback,
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.get_core_clock = can_numaker_get_core_clock,
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.get_max_filters = can_mcan_get_max_filters,
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.timing_min = CAN_MCAN_TIMING_MIN_INITIALIZER,
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.timing_max = CAN_MCAN_TIMING_MAX_INITIALIZER,
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#ifdef CONFIG_CAN_FD_MODE
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.set_timing_data = can_mcan_set_timing_data,
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.timing_data_min = CAN_MCAN_TIMING_DATA_MIN_INITIALIZER,
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.timing_data_max = CAN_MCAN_TIMING_DATA_MAX_INITIALIZER,
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#endif /* CONFIG_CAN_FD_MODE */
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};
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static int can_numaker_read_reg(const struct device *dev, uint16_t reg, uint32_t *val)
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{
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const struct can_mcan_config *mcan_cfg = dev->config;
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const struct can_numaker_config *numaker_cfg = mcan_cfg->custom;
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return can_mcan_sys_read_reg(numaker_cfg->canfd_base, reg, val);
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}
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static int can_numaker_write_reg(const struct device *dev, uint16_t reg, uint32_t val)
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{
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const struct can_mcan_config *mcan_cfg = dev->config;
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const struct can_numaker_config *numaker_cfg = mcan_cfg->custom;
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return can_mcan_sys_write_reg(numaker_cfg->canfd_base, reg, val);
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}
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static int can_numaker_read_mram(const struct device *dev, uint16_t offset, void *dst, size_t len)
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{
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const struct can_mcan_config *mcan_cfg = dev->config;
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const struct can_numaker_config *numaker_cfg = mcan_cfg->custom;
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return can_mcan_sys_read_mram(numaker_cfg->mram, offset, dst, len);
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}
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static int can_numaker_write_mram(const struct device *dev, uint16_t offset, const void *src,
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size_t len)
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{
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const struct can_mcan_config *mcan_cfg = dev->config;
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const struct can_numaker_config *numaker_cfg = mcan_cfg->custom;
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return can_mcan_sys_write_mram(numaker_cfg->mram, offset, src, len);
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}
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static int can_numaker_clear_mram(const struct device *dev, uint16_t offset, size_t len)
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{
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const struct can_mcan_config *mcan_cfg = dev->config;
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const struct can_numaker_config *numaker_cfg = mcan_cfg->custom;
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return can_mcan_sys_clear_mram(numaker_cfg->mram, offset, len);
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}
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static const struct can_mcan_ops can_numaker_ops = {
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.read_reg = can_numaker_read_reg,
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.write_reg = can_numaker_write_reg,
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.read_mram = can_numaker_read_mram,
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.write_mram = can_numaker_write_mram,
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.clear_mram = can_numaker_clear_mram,
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};
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#define NUMAKER_CLKCTRL_DEV_INIT(inst) \
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.clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(inst))),
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#define NUMAKER_PINCTRL_DEFINE(inst) \
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PINCTRL_DT_INST_DEFINE(inst);
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#define NUMAKER_PINCTRL_INIT(inst) \
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.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst),
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#define CAN_NUMAKER_INIT(inst) \
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NUMAKER_PINCTRL_DEFINE(inst); \
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CAN_MCAN_DT_INST_CALLBACKS_DEFINE(inst, can_numaker_cbs_##inst); \
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\
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static void can_numaker_irq_config_func_##inst(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(inst, int0, irq), \
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DT_INST_IRQ_BY_NAME(inst, int0, priority), \
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can_mcan_line_0_isr, \
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DEVICE_DT_INST_GET(inst), \
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0); \
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irq_enable(DT_INST_IRQ_BY_NAME(inst, int0, irq)); \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(inst, int1, irq), \
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DT_INST_IRQ_BY_NAME(inst, int1, priority), \
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can_mcan_line_1_isr, \
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DEVICE_DT_INST_GET(inst), \
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0); \
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irq_enable(DT_INST_IRQ_BY_NAME(inst, int1, irq)); \
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} \
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\
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static const struct can_numaker_config can_numaker_config_##inst = { \
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.canfd_base = CAN_MCAN_DT_INST_MCAN_ADDR(inst), \
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.mrba = CAN_MCAN_DT_INST_MRBA(inst), \
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.mram = CAN_MCAN_DT_INST_MRAM_ADDR(inst), \
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.reset = RESET_DT_SPEC_INST_GET(inst), \
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.clk_modidx = DT_INST_CLOCKS_CELL(inst, clock_module_index), \
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.clk_src = DT_INST_CLOCKS_CELL(inst, clock_source), \
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.clk_div = DT_INST_CLOCKS_CELL(inst, clock_divider), \
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NUMAKER_CLKCTRL_DEV_INIT(inst) \
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.irq_config_func = can_numaker_irq_config_func_##inst, \
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NUMAKER_PINCTRL_INIT(inst) \
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}; \
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\
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static const struct can_mcan_config can_mcan_config_##inst = \
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CAN_MCAN_DT_CONFIG_INST_GET(inst, \
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&can_numaker_config_##inst, \
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&can_numaker_ops, \
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&can_numaker_cbs_##inst); \
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\
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static uint32_t can_numaker_data_##inst; \
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\
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static struct can_mcan_data can_mcan_data_##inst = \
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CAN_MCAN_DATA_INITIALIZER(&can_numaker_data_ ## inst); \
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\
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CAN_DEVICE_DT_INST_DEFINE(inst, \
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can_numaker_init, \
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NULL, \
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&can_mcan_data_##inst, \
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&can_mcan_config_##inst, \
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POST_KERNEL, \
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CONFIG_CAN_INIT_PRIORITY, \
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&can_numaker_driver_api); \
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DT_INST_FOREACH_STATUS_OKAY(CAN_NUMAKER_INIT);
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