684f5ec12e
We should be adding a compiler barrier for IP and SP registers when we are doing syscall generation on ARMv6-M architecture. The syscall generation itself only does an SVC trigger; the execution returns to thread mode and ARM does not guarantee that IP register is preserved, when we finally get back to the point where the syscall was invoked. The SP also needs to be preserved for syscalls returning 64-bit results. In that case the r0 may hold a pointer to the stack where the 64-bit result was pushed, That is, the stack pointer may have been changed due to the syscall, and C code needs to know that. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no> |
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| .. | ||
| cortex_m | ||
| cortex_r | ||
| arch.h | ||
| asm_inline.h | ||
| asm_inline_gcc.h | ||
| error.h | ||
| exc.h | ||
| irq.h | ||
| misc.h | ||
| nmi.h | ||
| syscall.h | ||