4e5868faaf
This change adds support for the CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER option on Cortex-M platforms. While all Cortex-M platforms have a NVIC controller some custom SoCs may have additional IRQ controllers or custom handling. This change allows those SoCs to modify this bahaviour without having to place platform specific logic inside applications or drivers. Signed-off-by: Corey Wharton <xodus7@cwharton.com>
86 lines
3 KiB
Plaintext
86 lines
3 KiB
Plaintext
# ARM architecture configuration options
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# Copyright (c) 2014-2015 Wind River Systems, Inc.
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# SPDX-License-Identifier: Apache-2.0
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menu "ARM Options"
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depends on ARM
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config ARCH
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default "arm"
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config CPU_CORTEX
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bool
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help
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This option signifies the use of a CPU of the Cortex family.
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config ARM_CUSTOM_INTERRUPT_CONTROLLER
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bool
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help
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This option indicates that the ARM CPU is connected to a custom (i.e.
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non-GIC or NVIC) interrupt controller.
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A number of Cortex-A and Cortex-R cores (Cortex-A5, Cortex-R4/5, ...)
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allow interfacing to a custom external interrupt controller and this
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option must be selected when such cores are connected to an interrupt
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controller that is not the ARM Generic Interrupt Controller (GIC) or
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the Cortex-M ARM Nested Vectored Interrupt Controller (NVIC).
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When this option is selected, the architecture interrupt control
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functions are mapped to the SoC interrupt control interface, which is
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implemented at the SoC level.
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N.B. Since all Cortex-M cores have a NVIC, if this option is selected it
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is assumed that the custom interrupt control interface implementation
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assumes responsibility for handling the NVIC.
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config CODE_DATA_RELOCATION_SRAM
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bool "Relocate code/data sections to SRAM"
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depends on CPU_CORTEX_M
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select CODE_DATA_RELOCATION
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help
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When selected this will relocate .text, data and .bss sections from
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the specified files and places it in SRAM. The files should be specified
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in the CMakeList.txt file with a cmake API zephyr_code_relocate(). This
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config is used to create an MPU entry for the SRAM space used for code
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relocation.
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config ARM_ON_ENTER_CPU_IDLE_HOOK
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bool
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help
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Enables a hook (z_arm_on_enter_cpu_idle()) that is called when
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the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
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If needed, this hook can be used to prevent the CPU from actually
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entering sleep by skipping the WFE/WFI instruction.
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config ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
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bool
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help
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Enables a hook (z_arm_on_enter_cpu_idle_prepare()) that is called when
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the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
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If needed, this hook can prepare data to upcoming call to
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z_arm_on_enter_cpu_idle(). The z_arm_on_enter_cpu_idle_prepare differs
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from z_arm_on_enter_cpu_idle because it is called before interrupts are
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disabled.
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config ARM_ON_EXIT_CPU_IDLE
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bool
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help
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Enables a possibility to inject SoC-specific code just after WFI/WFE
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instructions of the cpu idle implementation.
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Enabling this option requires that the SoC provides a soc_cpu_idle.h
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header file which defines SOC_ON_EXIT_CPU_IDLE macro guarded by
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_ASMLANGUAGE.
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The SOC_ON_EXIT_CPU_IDLE macro is expanded just after
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WFI/WFE instructions before any memory access is performed. The purpose
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of the SOC_ON_EXIT_CPU_IDLE is to perform an action that mitigate issues
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observed on some SoCs caused by a memory access following WFI/WFE
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instructions.
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rsource "core/Kconfig"
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rsource "core/Kconfig.vfp"
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endmenu
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