9be3b8490b
Without this, cache manipulation cannot work in x86. clflush was introduced with SSE2 extension, but may be implemented without this extension and it seems that qemu made this choice a adding sse2 CPU capability does not include clflush. It enabled by default in 64 bits, so let's take care of this capability only for the 32bits version of the board. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> |
||
|---|---|---|
| .. | ||
| acrn | ||
| common | ||
| intel_adl | ||
| intel_ehl | ||
| intel_ish | ||
| intel_rpl | ||
| qemu_x86 | ||
| up_squared | ||
| index.rst | ||