Guillaume Gautier 6830c7d797 dts: arm: st: f0: Refactor stm32f0xx inclusion tree ... Modify the successive dtsi include to better reflect the underlying structure of the F0 family. There are two main subfamilies: STM32F0x0 on one side, and STM32F0x1, x2 and x8 on the other Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>		2023-03-07 15:49:30 +01:00
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arc/synopsys	soc: arc: define ICI in DT	2022-08-03 07:46:14 -04:00
arm	dts: arm: st: f0: Refactor stm32f0xx inclusion tree	2023-03-07 15:49:30 +01:00
arm64	soc: arm64: ti_sitara: Add pinctrl support for TI AM6X A53 SoC	2023-03-02 13:50:06 +01:00
bindings	drivers: kscan: Add driver for XPT2046	2023-03-06 17:21:17 +01:00
common	dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series	2021-04-27 11:53:37 +02:00
nios2/intel	dts: nios2: intel: nios2-qemu: add jtag interrupt	2023-01-27 14:24:43 -05:00
posix	dts: posix: Add DTS support for POSIX architecture	2019-05-28 21:14:19 -04:00
riscv	samples: die_temp_polling: Add esp32c3 overlay	2023-03-06 09:34:18 -06:00
sparc/gaisler	dts: sparc: Remove label property from devicetrees	2022-07-22 02:51:14 -05:00
x86/intel	board: *_x86: Allow pcie0 to be referenced	2022-11-22 16:24:49 +02:00
xtensa	intel_adsp: dts: ace: lower case 71C00 to fix DTC warning	2023-03-07 08:33:30 +01:00
binding-template.yaml	doc: devicetree: overhaul bindings guide	2021-04-22 15:32:10 +02:00
Kconfig	dts: Include Kconfig.dts as optional source	2022-08-15 11:10:51 -07:00