zephyr/boards/qemu/riscv32_xip/qemu_riscv32_xip_defconfig
Filip Kokosinski ab84989a12 arch/riscv: remove the Kconfig.core file
This commit removes the `Kconfig.core` file. It's been largely unused, and
the only symbol it provides (`RISCV_CORE_E31`) overlaps with the SoC-layer
provided `SOC_SERIES_SIFIVE_FREEDOM_FE300`.

As of date, the only SoC that uses the E31 core in Zephyr is the FE310 SoC.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-04-05 16:46:01 +03:00

11 lines
224 B
Plaintext

# SPDX-License-Identifier: Apache-2.0
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_SIFIVE_PORT_0=y
CONFIG_UART_CONSOLE=y
CONFIG_PINCTRL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=10000000
CONFIG_QEMU_ICOUNT_SHIFT=6