zephyr/arch/riscv
Corey Wharton 72afd96c9b arch: riscv: ensure fcsr is cleared on thread start or FPU enable
Ensure fcsr is always initially cleared for FPU enabled threads.

Signed-off-by: Corey Wharton <xodus7@cwharton.com>
2022-03-16 10:25:50 +01:00
..
core arch: riscv: ensure fcsr is cleared on thread start or FPU enable 2022-03-16 10:25:50 +01:00
include arch/riscv: Use arch_switch() for context swap 2022-02-25 19:13:50 -05:00
CMakeLists.txt riscv: toolchain arguments for a 64-bit build 2019-08-09 09:11:45 -05:00
Kconfig kconfig: remove Enable from boolean prompts 2022-03-09 15:35:54 +01:00