6ff7ec220e
In practice, PPR is intended to be running code from RAM, so make this the default choice for the `nrf54h20dk/nrf54h20/cpuppr` board target. Keep the MRAM execution option as a `xip` variant of that target, replacing the `ram` one. Align the default `cpuapp` configuration for copying PPR's image to RAM before it boots the child processor. Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
14 lines
252 B
YAML
14 lines
252 B
YAML
# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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identifier: nrf54h20dk/nrf54h20/cpuppr/xip
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name: nRF54H20-DK-nRF54H20-PPR (MRAM XIP)
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type: mcu
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arch: riscv
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toolchain:
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- zephyr
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ram: 62
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flash: 64
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supported:
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- gpio
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