Bartosz Bilas 55f2d72cd4 drivers: eth_esp32: allow selecting ref clk source ... In case of boards where REF_CLK signal is not connected to the GPIO0 by default add the possibility to use the optional GPIO16/GPIO17 as a REF CLK source. Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>		2023-11-30 10:02:31 +01:00
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arc/synopsys	uart: ns16550: use io-mapped DT property for IO port access	2023-09-26 12:03:04 +02:00
arm	dts: arm: rpi_pico: Add compat string to rp2040	2023-11-30 10:01:54 +01:00
arm64	dts: arm64: intel: intel_socfpga: Adding nodes for watchdog	2023-11-27 20:00:29 +01:00
bindings	drivers: eth_esp32: allow selecting ref clk source	2023-11-30 10:02:31 +01:00
common	dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series	2021-04-27 11:53:37 +02:00
nios2/intel	dts: nios2: intel: nios2-qemu: add jtag interrupt	2023-01-27 14:24:43 -05:00
posix
riscv	input: convert ite_it8xxx2_kbd driver from kscan to input	2023-11-10 16:30:37 +00:00
sparc/gaisler	dts/sparc/gaisler: add SoC and board compatible strings	2023-05-02 10:53:27 +02:00
x86/intel	dts: x86: intel: raptor_lake: Added LPSS dma node for UART	2023-11-22 17:31:08 +01:00
xtensa	soc: xtensa: esp32s3: Update SOC variant list	2023-11-22 21:56:39 +01:00
binding-template.yaml	doc: devicetree: overhaul bindings guide	2021-04-22 15:32:10 +02:00
Kconfig	dts: drop HAS_DTS	2023-10-20 12:18:17 -07:00