zephyr/dts
Erwan Gouriou 79e55c2a04 dts: wba: configure HSI16 as RNG clk source
We might have to do this differently:
Configure rng default clock in .dtsi
Set board specific config in .dts

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-12-18 17:31:08 +00:00
..
arc/synopsys uart: ns16550: use io-mapped DT property for IO port access 2023-09-26 12:03:04 +02:00
arm dts: wba: configure HSI16 as RNG clk source 2023-12-18 17:31:08 +00:00
arm64 dts: arm64: intel: add dts node for sdhc in agilex5 2023-12-18 15:00:38 +01:00
bindings drivers: sdhc: add cdns sdhc/combophy driver files 2023-12-18 15:00:38 +01:00
common dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series 2021-04-27 11:53:37 +02:00
nios2/intel dts: nios2: intel: nios2-qemu: add jtag interrupt 2023-01-27 14:24:43 -05:00
posix dts: posix: Add DTS support for POSIX architecture 2019-05-28 21:14:19 -04:00
riscv dts: riscv: Fix a typo in riscv,isa for mpfs 2023-12-12 16:26:17 +01:00
sparc/gaisler dts/sparc/gaisler: add SoC and board compatible strings 2023-05-02 10:53:27 +02:00
x86/intel dts: x86: intel: raptor_lake: Added LPSS dma node for UART 2023-11-22 17:31:08 +01:00
xtensa driver: input: espressif touch_sensor 2023-12-11 18:31:38 +01:00
binding-template.yaml doc: devicetree: overhaul bindings guide 2021-04-22 15:32:10 +02:00
Kconfig dts: drop HAS_DTS 2023-10-20 12:18:17 -07:00