7cbdb6c5c0
The newer series of timer drivers will compare counters vs. the last tick boundary to compute a number of ticks to announce to the kernel. In the case of CONFIG_TICKLESS=n, this actually represents a change of behavior from our old scheme where "ticks" always reflected the number of interrupts received. The distinction only matters when an interrupt is delayed more than a full tick, of course. But that actually makes a difference to some timekeeping code. Restore the old behavior. This also has the benefit of further reducing code size when !TICKLESS and improving performance of the ISR by removing the division (remember Cortex M0 has no hardware divide!). Fixes #12409 Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
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altera_avalon_timer_hal.c | ||
arcv2_timer0.c | ||
CMakeLists.txt | ||
cortex_m_systick.c | ||
hpet.c | ||
Kconfig | ||
legacy_api.h | ||
loapic_timer.c | ||
native_posix_timer.c | ||
nrf_rtc_timer.c | ||
riscv_machine_timer.c | ||
rv32m1_lptmr_timer.c | ||
sam0_rtc_timer.c | ||
sys_clock_init.c | ||
xtensa_sys_timer.c |