Nicolas Pitre 83f849e00e riscv: FPU trap: catch CSR access to fcsr, frm and fflags ... The FRCSR, FSCSR, FRRM, FSRM, FSRMI, FRFLAGS, FSFLAGS and FSFLAGSI are in fact CSR instructions targeting the fcsr, frm and fflags registers. They should be caught as FPU instructions as well. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>		2023-01-30 23:47:36 +00:00
..
arc	treewide: Use CONFIG_CPP instead of CONFIG_CPLUSPLUS	2023-01-13 17:42:55 -05:00
arm	arch: option to generate simplified error codes	2023-01-27 18:09:32 +09:00
arm64	arch/arm64: Implement ASID support in ARM64 MMU	2022-12-13 17:21:11 +09:00
common	include: add missing irq.h include	2022-10-11 18:05:17 +02:00
mips	include: types: remove ulong_t	2022-09-06 18:16:33 +02:00
nios2	arch: comply to coding guidelines MISRA C:2012 Rule 14.4	2022-07-20 09:28:38 -05:00
posix	arch: posix: Declare _posix_zephyr_main with int return type	2022-11-05 16:41:45 +09:00
riscv	riscv: FPU trap: catch CSR access to fcsr, frm and fflags	2023-01-30 23:47:36 +00:00
sparc	SPARC: reduce z_thread_entry_wrapper	2022-08-03 12:05:49 +02:00
x86	treewide: Disable automatic argparse argument shortening	2023-01-26 20:12:36 +09:00
xtensa	xtensa: stop execution under simulator for double exception	2023-01-23 10:09:18 +00:00
CMakeLists.txt	cmake: fix include directories to work with out-of-tree arch	2020-08-05 08:06:07 -04:00
Kconfig	arch: option to generate simplified error codes	2023-01-27 18:09:32 +09:00