a52f399623
disable flash controller for nonsecure core, as only the secure core is tested with flash support. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
37 lines
643 B
Plaintext
37 lines
643 B
Plaintext
/*
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* Copyright (c) 2019, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <arm/armv8-m.dtsi>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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soc {
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sram: sram@14000000 {
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ranges = <0x4000000 0x14000000 0x20000000>;
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};
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peripheral: peripheral@50000000 {
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ranges = <0x0 0x50000000 0x10000000>;
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iap: flash-controller@34000 {
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ranges = <0x0 0x10000000 0x3020000>;
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};
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};
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};
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};
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#include "nxp_lpc55S6x_common.dtsi"
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/*
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* Explicitly enable IAP after we include the common LPC55S6X dtsi file,
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* which will set it to disabled.
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*/
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&iap {
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status = "okay";
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};
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