zephyr/arch/arm64
Mykola Kvach c9b534c4eb arch: arm64: mmu: avoid using of set/way cache instructions
Architecturally, Set/Way operations are not guaranteed to affect all
caches prior to the PoC, and may require other IMPLEMENTATION DEFINED
maintenance (e.g. MMIO control of system-level caches).

First of all this patch was designed for Xen domain Zephyr build, set/way
ops are not easily virtualized by Xen. S/W emulation is disabled, because
IP-MMU is active for Dom0. IP-MMU is a IO-MMU made by Renesas, as any good
IO-MMU, it shares page-tables with CPU. Trying to emulate S/W with IP-MMU
active will lead to IO-MMU faults. So if we build Zephyr as a Xen Initial
domain, it won't work with cache management support enabled.

Exposing set/way cache maintenance to a virtual machine is unsafe, not
least because the instructions are not permission-checked, but also
because they are not broadcast between CPUs.

In this commit, VA data invalidate invoked after every mapping instead of
using set/way instructions on init MMU. So, it was easy to delete
sys_cache_data_invd_all from enable MMU function, becase every adding of
a new memory region to xclat tabes will cause invalidating of this memory
and in this way we sure that there are not any stale data inside.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-08-17 15:15:15 +02:00
..
core arch: arm64: mmu: avoid using of set/way cache instructions 2023-08-17 15:15:15 +02:00
include arch: arm64: Fix z_arm64_fatal_error declaration error 2023-07-11 15:04:54 +02:00
CMakeLists.txt arm/arm64: Make ARM64 a standalone architecture 2021-03-31 10:34:33 -05:00
Kconfig arm/arm64: Make ARM64 a standalone architecture 2021-03-31 10:34:33 -05:00