49f9aa7d12
Add support for using the sub second registers. It allows reading and setting alarm with the sub second tick resolution. The RTC module is configured to get as high frequency as possible, which equals the source clock (RTCCLK) divided by 2. To get such frequency, the asynchronous prescaler is set to 1. According to RM, setting the asynchronous prescaler to a high value minimize consumption, so the change increase the power consumption. Use a config to enable the sub second support. Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
57 lines
1.4 KiB
Plaintext
57 lines
1.4 KiB
Plaintext
# STM32 Cube LL RTC
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# Copyright (c) 2018, Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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menuconfig COUNTER_RTC_STM32
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bool "STM32 Counter RTC driver"
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default y if !RTC
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depends on DT_HAS_ST_STM32_RTC_ENABLED
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select USE_STM32_LL_RTC
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select USE_STM32_LL_PWR
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select USE_STM32_LL_RCC
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select USE_STM32_LL_EXTI
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help
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Build RTC driver for STM32 SoCs.
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Tested on STM32 C0, F0, F2, F3, F4, F7, G0, G4, H7, L1, L4, L5, U5 series
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if COUNTER_RTC_STM32
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choice COUNTER_RTC_STM32_CLOCK_SRC
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bool "RTC clock source"
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optional
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depends on COUNTER_RTC_STM32
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config COUNTER_RTC_STM32_CLOCK_LSI
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bool "LSI"
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select DEPRECATED
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help
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Use LSI as RTC clock
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Deprecated in favor of device tree secondary domain clock
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config COUNTER_RTC_STM32_CLOCK_LSE
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bool "LSE"
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select DEPRECATED
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help
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Use LSE as RTC clock
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Deprecated in favor of device tree secondary domain clock
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endchoice #COUNTER_RTC_STM32_CLOCK_SRC
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config COUNTER_RTC_STM32_SAVE_VALUE_BETWEEN_RESETS
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bool "Save rtc time value between resets"
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default n
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help
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Keep the counter value after each reset.
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config COUNTER_RTC_STM32_SUBSECONDS
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bool "Use the subseconds as a basic tick."
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depends on !SOC_SERIES_STM32F1X
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help
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Use the subseconds as the basic time tick. It increases resolution
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of the counter. The frequency of the time is RTC Source Clock divided
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by 2. It is the clock after the first asynchronous prescaler.
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The config increases power consumption.
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endif # COUNTER_RTC_STM32
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