zephyr/dts
Yong Cong Sin 8db1a5add2 drivers: intc: plic: support trigger type by default and hardcode offset
Removing the edge-trigger Kconfig as it is supported by default
in the RISCV PLIC specifications.

Define the edge-trigger register offset in the driver instead
of retrieving the value from devicetree as it is not something
configurable. The value 0x1080 is defined in Andes & Telink
datasheets.

Updated build_all testcase.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-10-04 09:06:28 -04:00
..
arc/synopsys uart: ns16550: use io-mapped DT property for IO port access 2023-09-26 12:03:04 +02:00
arm dts: silabs: Added pinctrl nodes for Silabs devices 2023-10-04 10:30:00 +03:00
arm64 dts: bindings: boards: Update Ethernet PHY to use reg property 2023-09-29 09:47:15 +02:00
bindings drivers: intc: plic: support trigger type by default and hardcode offset 2023-10-04 09:06:28 -04:00
common dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series 2021-04-27 11:53:37 +02:00
nios2/intel dts: nios2: intel: nios2-qemu: add jtag interrupt 2023-01-27 14:24:43 -05:00
posix dts: posix: Add DTS support for POSIX architecture 2019-05-28 21:14:19 -04:00
riscv ITE: dts: it8xxx2: Correct the clock frequency of baud rate 2023-10-03 18:26:45 +01:00
sparc/gaisler dts/sparc/gaisler: add SoC and board compatible strings 2023-05-02 10:53:27 +02:00
x86/intel boards: x86: add eMMC support for Intel Alder lake platform 2023-09-29 16:29:00 +02:00
xtensa dts: bindings: boards: Update Ethernet PHY to use reg property 2023-09-29 09:47:15 +02:00
binding-template.yaml doc: devicetree: overhaul bindings guide 2021-04-22 15:32:10 +02:00
Kconfig dts: Include Kconfig.dts as optional source 2022-08-15 11:10:51 -07:00