94107bc71d
Rather than having a zephyr specific property we will encode the IRQ priority as part of the interrupt property for ARM NVIC based interrupt controllers. Change-Id: I7d1489f0bffa7a6369f0622f748bb70dc83fa0cd Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
26 lines
446 B
Plaintext
26 lines
446 B
Plaintext
#include "skeleton.dtsi"
|
|
|
|
/ {
|
|
soc {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "simple-bus";
|
|
interrupt-parent = <&nvic>;
|
|
ranges;
|
|
|
|
nvic: interrupt-controller@e000e100 {
|
|
compatible = "arm,armv7m-nvic";
|
|
reg = <0xe000e100 0xc00>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
systick: timer@e000e010 {
|
|
compatible = "arm,armv7m-systick";
|
|
reg = <0xe000e010 0x10>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|