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zephyr/dts/arm/atmel/same70.dtsi
Bjarki Arge Andreasen 6f28ea08a5 atmel: sam: flash: Add flash pages property 
This commit adds layput page cells to the atmel sam flash
controller and the flash node. These allow for describing
the actual flash page layout of each soc, allowing the
flash driver to fully utilize the capabilities of the
flash.

With this update, we unlock the following capabilties:
  - utilize 2048 erase block size for small sectors
  - utilize 16384 erase block size for large sectors

Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
2024-01-23 15:22:26 +00:00

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/*
* Copyright (c) 2017 Piotr Mienkowski
* Copyright (c) 2017 Justin Watson
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
/ {
aliases {
watchdog0 = &wdt;
};
chosen {
zephyr,flash-controller = &eefc;
};
chosen {
zephyr,entropy = &trng;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m7";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
};
};
};
sram0: memory@20400000 {
compatible = "mmio-sram";
};
soc {
pmc: pmc@400e0600 {
compatible = "atmel,sam-pmc";
reg = <0x400e0600 0x200>;
interrupts = <5 0>;
#clock-cells = <2>;
status = "okay";
};
supc: supc@400e1810 {
compatible = "atmel,sam-supc";
reg = <0x400e1810 0x20>;
#wakeup-source-id-cells = <1>;
status = "okay";
};
eefc: flash-controller@400e0c00 {
compatible = "atmel,sam-flash-controller";
reg = <0x400e0c00 0x200>;
interrupts = <6 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
#address-cells = <1>;
#size-cells = <1>;
#erase-block-cells = <2>;
flash0: flash@400000 {
compatible = "atmel,sam-flash", "soc-nv-flash";
write-block-size = <16>;
erase-block-size = <8192>;
};
};
wdt: watchdog@400e1850 {
compatible = "atmel,sam-watchdog";
reg = <0x400e1850 0xc>;
interrupts = <4 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
status = "disabled";
};
twihs0: i2c@40018000 {
compatible = "atmel,sam-i2c-twihs";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40018000 0x12B>;
interrupts = <19 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
status = "disabled";
};
twihs1: i2c@4001c000 {
compatible = "atmel,sam-i2c-twihs";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4001c000 0x12B>;
interrupts = <20 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
status = "disabled";
};
twihs2: i2c@40060000 {
compatible = "atmel,sam-i2c-twihs";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40060000 0x12B>;
interrupts = <41 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
status = "disabled";
};
spi0: spi@40008000 {
compatible = "atmel,sam-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40008000 0x4000>;
interrupts = <21 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
status = "disabled";
};
spi1: spi@40058000 {
compatible = "atmel,sam-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40058000 0x4000>;
interrupts = <42 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
status = "disabled";
};
uart0: uart@400e0800 {
compatible = "atmel,sam-uart";
reg = <0x400e0800 0x100>;
interrupts = <7 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
status = "disabled";
};
uart1: uart@400e0a00 {
compatible = "atmel,sam-uart";
reg = <0x400e0a00 0x100>;
interrupts = <8 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
status = "disabled";
};
uart2: uart@400e1a00 {
compatible = "atmel,sam-uart";
reg = <0x400e1a00 0x100>;
interrupts = <44 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
status = "disabled";
};
uart3: uart@400e1c00 {
compatible = "atmel,sam-uart";
reg = <0x400e1c00 0x100>;
interrupts = <45 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
status = "disabled";
};
uart4: uart@400e1e00 {
compatible = "atmel,sam-uart";
reg = <0x400e1e00 0x100>;
interrupts = <46 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
status = "disabled";
};
usart0: usart@40024000 {
compatible = "atmel,sam-usart";
reg = <0x40024000 0x100>;
interrupts = <13 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
status = "disabled";
};
usart1: usart@40028000 {
compatible = "atmel,sam-usart";
reg = <0x40028000 0x100>;
interrupts = <14 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
status = "disabled";
};
usart2: usart@4002c000 {
compatible = "atmel,sam-usart";
reg = <0x4002c000 0x100>;
interrupts = <15 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
status = "disabled";
};
afec0: adc@4003c000 {
compatible = "atmel,sam-afec";
reg = <0x4003c000 0x100>;
interrupts = <29 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
status = "disabled";
#io-channel-cells = <1>;
};
afec1: adc@40064000 {
compatible = "atmel,sam-afec";
reg = <0x40064000 0x100>;
interrupts = <40 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
status = "disabled";
#io-channel-cells = <1>;
};
dacc: dacc@40040000 {
compatible = "atmel,sam-dac";
reg = <0x40040000 0x100>;
interrupts = <30 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
status = "disabled";
#io-channel-cells = <1>;
};
pinctrl: pinctrl@400e0e00 {
compatible = "atmel,sam-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x400e0e00 0x400e0e00 0xa00>;
pioa: gpio@400e0e00 {
compatible = "atmel,sam-gpio";
reg = <0x400e0e00 0x190>;
interrupts = <10 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
piob: gpio@400e1000 {
compatible = "atmel,sam-gpio";
reg = <0x400e1000 0x190>;
interrupts = <11 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
pioc: gpio@400e1200 {
compatible = "atmel,sam-gpio";
reg = <0x400e1200 0x190>;
interrupts = <12 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
piod: gpio@400e1400 {
compatible = "atmel,sam-gpio";
reg = <0x400e1400 0x190>;
interrupts = <16 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
pioe: gpio@400e1600 {
compatible = "atmel,sam-gpio";
reg = <0x400e1600 0x190>;
interrupts = <17 1>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
gpio-controller;
#gpio-cells = <2>;
#atmel,pin-cells = <2>;
};
};
pwm0: pwm0@40020000 {
compatible = "atmel,sam-pwm";
reg = <0x40020000 0x4000>;
interrupts = <31 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
status = "disabled";
prescaler = <10>;
divider = <1>;
#pwm-cells = <3>;
};
pwm1: pwm1@4005c000 {
compatible = "atmel,sam-pwm";
reg = <0x4005c000 0x4000>;
interrupts = <60 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 60>;
status = "disabled";
prescaler = <10>;
divider = <1>;
#pwm-cells = <3>;
};
usbhs: usbd@40038000 {
compatible = "atmel,sam-usbhs";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40038000 0x4000>;
interrupts = <34 0>;
interrupt-names = "usbhs";
maximum-speed = "high-speed";
num-bidir-endpoints = <10>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
status = "disabled";
};
gmac: ethernet@40050000 {
compatible = "atmel,sam-gmac";
reg = <0x40050000 0x4000>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
interrupts = <39 0>, <66 0>, <67 0>;
interrupt-names = "gmac", "q1", "q2";
num-queues = <3>;
local-mac-address = [00 00 00 00 00 00];
status = "disabled";
};
mdio: mdio@40050000 {
compatible = "atmel,sam-mdio";
reg = <0x40050000 0x4000>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
tc0: tc@4000c000 {
compatible = "atmel,sam-tc";
reg = <0x4000c000 0x100>;
interrupts = <23 0
24 0
25 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>,
<&pmc PMC_TYPE_PERIPHERAL 24>,
<&pmc PMC_TYPE_PERIPHERAL 25>;
status = "disabled";
};
tc1: tc@40010000 {
compatible = "atmel,sam-tc";
reg = <0x40010000 0x100>;
interrupts = <26 0
27 0
28 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>,
<&pmc PMC_TYPE_PERIPHERAL 27>,
<&pmc PMC_TYPE_PERIPHERAL 28>;
status = "disabled";
};
tc2: tc@40014000 {
compatible = "atmel,sam-tc";
reg = <0x40014000 0x100>;
interrupts = <47 0
48 0
49 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 47>,
<&pmc PMC_TYPE_PERIPHERAL 48>,
<&pmc PMC_TYPE_PERIPHERAL 49>;
status = "disabled";
};
tc3: tc@40054000 {
compatible = "atmel,sam-tc";
reg = <0x40054000 0x100>;
interrupts = <50 0
51 0
52 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 50>,
<&pmc PMC_TYPE_PERIPHERAL 51>,
<&pmc PMC_TYPE_PERIPHERAL 52>;
status = "disabled";
};
trng: random@40070000 {
compatible = "atmel,sam-trng";
reg = <0x40070000 0x4000>;
interrupts = <57 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 57>;
status = "okay";
};
xdmac: dma0: dma-controller@40078000 {
compatible = "atmel,sam-xdmac";
reg = <0x40078000 0x400>;
interrupts = <58 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 58>;
#dma-cells = <2>;
status = "disabled";
};
ssc: ssc@40004000 {
compatible = "atmel,sam-ssc";
reg = <0x40004000 0x4000>;
interrupts = <22 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
status = "disabled";
};
can0: can@40030000 {
compatible = "atmel,sam-can";
reg = <0x40030000 0x100>;
interrupts = <35 0>, <36 0>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
divider = <6>;
bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
sample-point = <875>;
sample-point-data = <875>;
status = "disabled";
};
can1: can@40034000 {
compatible = "atmel,sam-can";
reg = <0x40034000 0x100>;
interrupts = <37 0>, <38 0>;
interrupt-names = "int0", "int1";
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
divider = <6>;
bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
sample-point = <875>;
sample-point-data = <875>;
status = "disabled";
};
rstc: rstc@400e1800 {
compatible = "atmel,sam-rstc";
reg = <0x400e1800 0x10>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 1>;
user-nrst;
};
rtc: rtc@400e1860 {
compatible = "atmel,sam-rtc";
reg = <0x400e1860 0x100>;
interrupts = <2 0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
alarms-count = <1>;
status = "disabled";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};
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