537d5c310c
Convert all of the NXP SOCs with ENET to use the new binding scheme, which is used by the new driver. Convert any boards using this SOC to the new scheme as well, and remove from the documentation the bit about the experimental nature of the new driver and the overlay that shall no longer exist. Some of the boards I do not have the hardware of, so apologies if something breaks, as I have no way to know. All the boards were made sure to at least build. Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
209 lines
4.4 KiB
Plaintext
209 lines
4.4 KiB
Plaintext
/*
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* Copyright (c) 2018, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_rt1020.dtsi>
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#include "mimxrt1020_evk-pinctrl.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "NXP MIMXRT1020-EVK board";
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compatible = "nxp,mimxrt1021";
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aliases {
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led0 = &green_led;
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sw0 = &user_button;
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sdhc0 = &usdhc1;
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};
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chosen {
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zephyr,flash-controller = &is25wp064;
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zephyr,flash = &is25wp064;
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zephyr,code-partition = &slot0_partition;
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zephyr,sram = &sdram0;
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zephyr,itcm = &itcm;
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zephyr,dtcm = &dtcm;
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zephyr,console = &lpuart1;
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zephyr,shell-uart = &lpuart1;
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};
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sdram0: memory@80000000 {
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/* ISSI IS42S16160J-6TLI */
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device_type = "memory";
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reg = <0x80000000 DT_SIZE_M(32)>;
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};
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leds {
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compatible = "gpio-leds";
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green_led: led-1 {
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gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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label = "User LD1";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button-1 {
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label = "User SW4";
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gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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arduino_header: connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpio1 26 0>, /* A0 */
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<1 0 &gpio1 27 0>, /* A1 */
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<2 0 &gpio1 28 0>, /* A2 */
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<3 0 &gpio1 29 0>, /* A3 */
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<4 0 &gpio1 31 0>, /* A4 */
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<5 0 &gpio1 30 0>, /* A5 */
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<6 0 &gpio1 25 0>, /* D0 */
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<7 0 &gpio1 24 0>, /* D1 */
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<8 0 &gpio1 9 0>, /* D2 */
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<9 0 &gpio1 7 0>, /* D3 */
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<10 0 &gpio1 5 0>, /* D4 */
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<11 0 &gpio1 6 0>, /* D5 */
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<12 0 &gpio1 14 0>, /* D6 */
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<13 0 &gpio1 22 0>, /* D7 */
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<14 0 &gpio1 23 0>, /* D8 */
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<15 0 &gpio1 15 0>, /* D9 */
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<16 0 &gpio1 11 0>, /* D10 */
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<17 0 &gpio1 12 0>, /* D11 */
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<18 0 &gpio1 13 0>, /* D12 */
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<19 0 &gpio1 10 0>, /* D13 */
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<20 0 &gpio3 23 0>, /* D14 */
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<21 0 &gpio3 22 0>; /* D15 */
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};
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};
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arduino_serial: &lpuart2 {
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pinctrl-0 = <&pinmux_lpuart2>;
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pinctrl-1 = <&pinmux_lpuart2_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&flexspi {
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status = "okay";
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reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>;
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is25wp064: is25wp064@0 {
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compatible = "nxp,imx-flexspi-nor";
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size = <67108864>;
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reg = <0>;
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spi-max-frequency = <133000000>;
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status = "okay";
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jedec-id = [9d 70 17];
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erase-block-size = <4096>;
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write-block-size = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 DT_SIZE_K(64)>;
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};
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/* Note slot 0 has one additional sector,
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* this is intended for use with the swap move algorithm
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*/
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slot0_partition: partition@10000 {
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label = "image-0";
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reg = <0x00010000 (DT_SIZE_M(3) + DT_SIZE_K(4))>;
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};
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slot1_partition: partition@311000 {
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label = "image-1";
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reg = <0x00311000 DT_SIZE_M(3)>;
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};
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storage_partition: partition@611000 {
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label = "storage";
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reg = <0x00611000 DT_SIZE_K(1980)>;
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};
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};
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};
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};
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&lpi2c1 {
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status = "okay";
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pinctrl-0 = <&pinmux_lpi2c1>;
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pinctrl-names = "default";
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};
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&lpi2c4 {
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status = "okay";
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pinctrl-0 = <&pinmux_lpi2c4>;
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pinctrl-names = "default";
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};
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&lpuart1 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&pinmux_lpuart1>;
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pinctrl-1 = <&pinmux_lpuart1_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&lpspi1 {
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status = "okay";
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/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
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dmas = <&edma0 0 13>, <&edma0 1 14>;
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dma-names = "rx", "tx";
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pinctrl-0 = <&pinmux_lpspi1>;
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pinctrl-names = "default";
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};
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zephyr_udc0: &usb1 {
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status = "okay";
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};
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&usdhc1 {
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status = "okay";
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no-1-8-v;
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pinctrl-0 = <&pinmux_usdhc1>;
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pinctrl-1 = <&pinmux_usdhc1_slow>;
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
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pwr-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
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sdmmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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};
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};
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&adc1 {
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status = "okay";
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pinctrl-0 = <&pinmux_adc1>;
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pinctrl-names = "default";
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};
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&sai3 {
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pinctrl-0 = <&pinmux_sai3>;
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pinctrl-names = "default";
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};
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&edma0 {
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status = "okay";
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};
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/* GPT and Systick are enabled. If power management is enabled, the GPT
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* timer will be used instead of systick, as allows the core clock to
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* be gated.
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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&systick {
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status = "okay";
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};
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