Flavio Ceolin 3e5a593de9 intel_adsp/cavs: power: Fix INTLEVEL value ... In pm_state_set we can't just call k_cpu_idle() because this will clear out PS.INTLEVEL. Use k_cpu_atomic_idle instead since Zephyr's expect interruptions to be locked after pm_state_set. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>		2024-01-30 10:28:57 -06:00
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dc233c	xtensa: dc233c: force invalidating TLBs during page table swap	2023-12-27 15:59:05 +00:00
espressif_esp32	soc: esp32: refactor esp32_net	2024-01-13 00:22:24 +00:00
intel_adsp	intel_adsp/cavs: power: Fix INTLEVEL value	2024-01-30 10:28:57 -06:00
nxp_adsp	xtensa: nxp_adsp: common: Remove soc.c	2024-01-18 20:12:13 +01:00
sample_controller	cmake: cleanup and simplify the standard include logic in Zephyr	2023-11-06 18:57:30 -05:00
CMakeLists.txt	soc/xtensa/intel_adsp: Upstream updates	2020-10-21 06:38:53 -04:00