3a48365bab
The generation of the software ISR table and the IRQ vector table
(respectively generated by CONFIG_GEN_SW_ISR_TABLE and
CONFIG_GEN_IRQ_VECTOR_TABLE) should (in theory) go through three stages:
1. A placeholder table is generated in arch/common/isr_tables.c and
placed in an orphaned .gnu.linkonce.{irq_vector_table, sw_isr_table}
section
2. The real table is generated by arch/common/gen_isr_tables.py (creating
the build/zephyr/isr_tables.c file)
3. The real table is un-orphaned by moving it in a proper section with a
proper alignment
While all the steps are done automatically for the software ISR table,
for the IRQ vector table each architectures must take care of modiying
its own linker script to place somewhere the generated IRQ vector table
(basically step 3 is missing).
This is currently only done for 2 architectures: Cortex-M (ARMv7) and
ARC. But when another architecture tries to use the IRQ vector table,
the linker complains about that. For example:
Linking C executable zephyr/zephyr.elf
riscv64-zephyr-elf/bin/ld.bfd: warning: orphan section
`.gnu.linkonce.irq_vector_table' from
`zephyr/CMakeFiles/zephyr_final.dir/isr_tables.c.obj' being placed in
section `.gnu.linkonce.irq_vector_table'
In this patch we introduce a new CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN to
support the architectures requiring a special alignment for the IRQ
vector table and we also introduce a way to automatically place the IRQ
vector table in place in the same way it is done for the ISR software
table.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
78 lines
2.2 KiB
CMake
78 lines
2.2 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
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if(CONFIG_GEN_ISR_TABLES)
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zephyr_library()
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zephyr_library_sources_ifdef(
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CONFIG_GEN_ISR_TABLES
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sw_isr_common.c
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)
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endif()
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if(NOT CONFIG_ARCH_HAS_TIMING_FUNCTIONS AND
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NOT CONFIG_SOC_HAS_TIMING_FUNCTIONS AND
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NOT CONFIG_BOARD_HAS_TIMING_FUNCTIONS)
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zephyr_library_sources_ifdef(CONFIG_TIMING_FUNCTIONS timing.c)
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endif()
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# Put functions and data in their own binary sections so that ld can
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# garbage collect them
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zephyr_cc_option(-ffunction-sections -fdata-sections)
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zephyr_linker_sources_ifdef(CONFIG_GEN_ISR_TABLES
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SECTIONS
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${ZEPHYR_BASE}/include/zephyr/linker/intlist.ld
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)
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zephyr_linker_sources_ifdef(CONFIG_GEN_IRQ_VECTOR_TABLE
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ROM_START
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SORT_KEY 0x0vectors
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${ZEPHYR_BASE}/include/zephyr/linker/irq-vector-table-section.ld
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)
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if(CONFIG_GEN_ISR_TABLES)
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zephyr_linker_section(NAME .intList VMA IDT_LIST LMA IDT_LIST NOINPUT PASS NOT LINKER_ZEPHYR_FINAL)
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zephyr_linker_section_configure(SECTION .intList KEEP INPUT ".irq_info" FIRST)
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zephyr_linker_section_configure(SECTION .intList KEEP INPUT ".intList")
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zephyr_linker_section_configure(SECTION /DISCARD/ KEEP INPUT ".irq_info" PASS LINKER_ZEPHYR_FINAL)
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zephyr_linker_section_configure(SECTION /DISCARD/ KEEP INPUT ".intList" PASS LINKER_ZEPHYR_FINAL)
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endif()
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zephyr_linker_sources_ifdef(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
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RAM_SECTIONS
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ramfunc.ld
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)
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zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY
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RAM_SECTIONS
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nocache.ld
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)
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# Only ARM, X86 and OPENISA_RV32M1_RISCV32 use ROM_START_OFFSET.
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if (DEFINED CONFIG_ARM OR DEFINED CONFIG_X86 OR DEFINED CONFIG_ARM64
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OR DEFINED CONFIG_SOC_OPENISA_RV32M1_RISCV32)
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zephyr_linker_sources(ROM_START SORT_KEY 0x0 rom_start_offset.ld)
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# Handled in ld.cmake
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endif()
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# isr_tables is a normal CMake library and not a zephyr_library because it
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# should not be --whole-archive'd
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if (CONFIG_GEN_ISR_TABLES)
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add_library(isr_tables
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isr_tables.c
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)
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add_dependencies(isr_tables zephyr_generated_headers)
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target_link_libraries(isr_tables zephyr_interface)
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zephyr_library_link_libraries(isr_tables)
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endif()
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if(CONFIG_COVERAGE)
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zephyr_compile_options($<TARGET_PROPERTY:compiler,coverage>)
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zephyr_link_libraries($<TARGET_PROPERTY:linker,coverage>)
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endif()
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zephyr_sources_ifdef(CONFIG_SEMIHOST semihost.c)
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