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Flavio Ceolin 0a7251e365 xtensa: mmu: Fix tlb shootdown 
Fix the way we read the current l1 page table set in the mmu.
We use it check if the current page table is different from the
running thread.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2023-12-12 10:58:03 +01:00
..
arc arch: _PrepC -> z_prep_c 2023-12-11 18:23:52 -05:00
arm arch: arm: z_arm_prep_c -> z_prep_c 2023-12-11 18:23:52 -05:00
arm64 x86: add CODE_UNREACHABLE after z_cstart 2023-12-11 18:23:52 -05:00
common arch: common: multilevel irq: verify interrupt level bits configuration 2023-12-08 08:40:41 -05:00
mips arch: _PrepC -> z_prep_c 2023-12-11 18:23:52 -05:00
nios2 arch: _PrepC -> z_prep_c 2023-12-11 18:23:52 -05:00
posix native_simulator: Allow to pass extra options for localizing symbols 2023-12-06 09:25:41 +00:00
riscv arch: _PrepC -> z_prep_c 2023-12-11 18:23:52 -05:00
sparc arch: _PrepC -> z_prep_c 2023-12-11 18:23:52 -05:00
x86 arch: x86: z_x86_prep_c -> z_prep_c 2023-12-11 18:23:52 -05:00
xtensa xtensa: mmu: Fix tlb shootdown 2023-12-12 10:58:03 +01:00
CMakeLists.txt cmake: enable -Wshadow partially for in-tree code 2023-08-22 11:39:58 +02:00
Kconfig arch/Kconfig: Fix ARCH_POSIX comment 2023-12-07 10:39:31 +00:00