dcbc56cfe7
PR #30403 implemented nocache regions for ethernet DMA buffers in sram3 to fix issue #29915. Unfortunately, some STM32H7 variants do not have any sram3 so they still suffer from #29915. All H7 variants have sram2 though, so use that for targets without sram3. Signed-off-by: Björn Stenberg <bjorn@haxx.se> |
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