7a043d6f19
Testing NMI on emulated QEMU platforms brings some interesting and wrong
results like:
START - test_arm_runtime_nmi
Trigger NMI in 10s: 0 s
Trigger NMI in 10s: 1 s
Trigger NMI in 10s: 2 s
Trigger NMI in 10s: 3 s
Trigger NMI in 10s: 4 s
Trigger NMI in 10s: 5 s
Trigger NMI in 10s: 6 s
Trigger NMI in 10s: 7 s
Trigger NMI in 10s: 8 s
Trigger NMI in 10s: 9 s
NMI triggered (test_handler_isr)!
Assertion failed at ... arm_runtime_nmi_fn_test_arm_runtime_nmi:
(nmi_triggered is false)
Isr not triggered!
where the NMI handler is correctly called, see `NMI triggered`, but the
assert still fails on `nmi_triggered` being false.
This is due to a limitation in the emulation but also in the test not
being strictly architecturally compliant (you need a DSB;ISB sequence
after writing to SCB).
Add the proper barriers after writing to `SCB->ISCR` to make it
compliant and making it pass on QEMU as well.
Also reduce the timing to 2 sec.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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| .. | ||
| arc/arc_dsp_sharing | ||
| arm | ||
| arm64 | ||
| common | ||
| riscv/fpu_sharing | ||
| x86 | ||