Jaroslaw Stelter b8fb89dc27 intel_adsp: ace20_lnl: ssp: Add new ssp shims ... In ACE 2.0 platform (LNL) ssp got new shim registers. SSP driver need to program them to configure the interface. This patch adds new shims to device tree. Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>		2023-04-03 15:17:21 +02:00
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arc/synopsys	dts: boards :emsdp: add SPI support	2023-03-10 11:39:24 +01:00
arm	dts: arm: stm32h5 adds the ADC and DAC nodes	2023-04-03 09:50:43 +02:00
arm64	soc: arm64: ti_sitara: Add pinctrl support for TI AM6X A53 SoC	2023-03-02 13:50:06 +01:00
bindings	intel_adsp: ace20_lnl: ssp: Add new ssp shims	2023-04-03 15:17:21 +02:00
common	dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series	2021-04-27 11:53:37 +02:00
nios2/intel	dts: nios2: intel: nios2-qemu: add jtag interrupt	2023-01-27 14:24:43 -05:00
posix	dts: posix: Add DTS support for POSIX architecture	2019-05-28 21:14:19 -04:00
riscv	dts: mpfs_icicle: add all uart nodes to the Devicetree	2023-03-21 13:39:52 +01:00
sparc/gaisler	dts: sparc: Remove label property from devicetrees	2022-07-22 02:51:14 -05:00
x86/intel	dts: x86: intel: raptor_lake: Added UART instances	2023-03-30 09:43:29 -04:00
xtensa	intel_adsp: ace20_lnl: ssp: Add new ssp shims	2023-04-03 15:17:21 +02:00
binding-template.yaml	doc: devicetree: overhaul bindings guide	2021-04-22 15:32:10 +02:00
Kconfig	dts: Include Kconfig.dts as optional source	2022-08-15 11:10:51 -07:00