zephyr/soc
Jay Vasanth e74978cc03 microchip: mec: zephyr spi image generation
Added mchp mec zephyr image generator python script. It takes
zephyr.bin as input and produces zephyr.mchp.bin.
The default behavior is to not pad to SPI flash size.
(Enable through CONFIG_MCHP_MEC_UNSIGNED_HEADER=y and
CONFIG_MCHP_MEC_HEADER_FLASH_SIZE_256K=y)

zephyr.mchp.bin is composed of:
1. First 4KB contains TAG at offset 0 and header at offset 0x100
2. Offset 0x1000 is the start of zephyr.bin which has been padded
to a multiple of 128 bytes.
3. Boot-ROM EC Info Block (128 bytes)
4. Boot-ROM Co-Signature Block (96 bytes)
5. Boot-ROM trailer (160 bytes) contains the SHA-384 digest of 2-4.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-07-01 11:35:13 +02:00
..
arc soc: arch: snps_arc_iot: select UART_NS16550_ACCESS_IOPORT 2022-06-16 11:28:13 +02:00
arm microchip: mec: zephyr spi image generation 2022-07-01 11:35:13 +02:00
arm64 xenvm: drivers: xen: add Xen grant table driver 2022-06-28 22:34:26 -04:00
mips asm: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
nios2 linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
posix linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
riscv soc: riscv: telink_b91: add dfu related configurations for b91 platform 2022-06-24 20:25:33 +02:00
sparc linker: update files with <zephyr/...> include prefix 2022-05-09 12:45:29 -04:00
x86 test: Enable the GPIO tests on EHL_CRB. 2022-06-21 10:47:56 +02:00
xtensa soc/xtensa/intel_adsp/tools: Dial back stream reset sleep 2022-06-30 06:13:30 -04:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00