Gerard Marull-Paretas c42ef7117d dts: riscv: sifive: fu540: add missing ngpios property ... FU540 SoC has 16 GPIOs, this way, the GPIO API can perform correct asserts when a pin is provided. Note that default is 32, correct for eg FE310. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>		2024-01-19 15:13:53 +00:00
..
arc/synopsys	uart: ns16550: use io-mapped DT property for IO port access	2023-09-26 12:03:04 +02:00
arm	dts: arm: nxp_rt5xx: add definition of the DMIC to devicetree	2024-01-17 14:43:52 +01:00
arm64	soc: imx93: enable rgpio driver	2024-01-16 20:50:11 -05:00
bindings	drivers: sensor: Aosong AGS10 TVOC sensor	2024-01-19 06:06:02 -06:00
common
nios2/intel
posix
riscv	dts: riscv: sifive: fu540: add missing ngpios property	2024-01-19 15:13:53 +00:00
sparc/gaisler
x86/intel	dts: x86: intel: alder_lake: Added UARTs DMA instances	2024-01-11 15:41:42 -06:00
xtensa	soc: esp32: refactor esp32_net	2024-01-13 00:22:24 +00:00
binding-template.yaml
Kconfig	dts: drop HAS_DTS	2023-10-20 12:18:17 -07:00