d8f186aa4a
Add an API that utilizes the ARM semihosting mechanism to interact with the host system when a device is being emulated or run under a debugger. RISCV is implemented in terms of the ARM implementation, and therefore the ARM definitions cross enough architectures to be defined 'common'. Functionality is exposed as a separate API instead of syscall implementations (`_lseek`, `_open`, etc) due to various quirks with the ARM mechanisms that means function arguments are not standard. For more information see: https://developer.arm.com/documentation/dui0471/m/what-is-semihosting- Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au> impl |
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| .. | ||
| CMakeLists.txt | ||
| gen_isr_tables.py | ||
| isr_tables.c | ||
| Kconfig | ||
| nocache.ld | ||
| ramfunc.ld | ||
| rom_start_offset.ld | ||
| semihost.c | ||
| sw_isr_common.c | ||
| timing.c | ||