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zephyr/soc/xtensa
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Shubham Kulkarni 49941733c6 boards: esp32: linker: move libraries and reserve DRAM regions 
Fix issues with restoring symbols from common ld templates
Workaround esptool linker sections limit
Move kernel library into IRAM
Improve UDP throughput

Signed-off-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2021-01-13 09:10:46 -05:00
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esp32 boards: esp32: linker: move libraries and reserve DRAM regions 2021-01-13 09:10:46 -05:00
intel_adsp soc: intel_adsp: set trace size to non-zero 2021-01-12 20:53:40 -05:00
intel_s1000 xtensa: set toolchain variant per SoC 2020-12-20 14:30:50 -05:00
sample_controller xtensa: set toolchain variant per SoC 2020-12-20 14:30:50 -05:00
CMakeLists.txt soc/xtensa/intel_adsp: Upstream updates 2020-10-21 06:38:53 -04:00